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Part RoHS Manufacturer Logic IC Type Temperature Grade Terminal Form No. of Terminals Package Code Package Shape Total Dose (V) Package Body Material Schmitt Trigger Surface Mount No. of Functions Technology Screening Level No. of Bits Packing Method Nominal Supply Voltage / Vsup (V) Power Supplies (V) Load Capacitance (CL) Package Style (Meter) Package Equivalence Code Propagation Delay (tpd) Maximum I (ol) Sub-Category Terminal Pitch Maximum Operating Temperature Output Characteristics Minimum Operating Temperature Terminal Finish Terminal Position JESD-30 Code Moisture Sensitivity Level (MSL) Maximum Supply Voltage (Vsup) Maximum Seated Height Width Qualification Output Polarity Minimum Supply Voltage (Vsup) Maximum Power Supply Current (ICC) Additional Features JESD-609 Code Maximum Time At Peak Reflow Temperature (s) Peak Reflow Temperature (C) Length Family

MC10165FNR2

Onsemi

ENCODER

OTHER

J BEND

20

QCCJ

SQUARE

PLASTIC/EPOXY

YES

1

ECL

8

CHIP CARRIER

4 ns

1.27 mm

85 Cel

-30 Cel

TIN LEAD

QUAD

S-PQCC-J20

4.57 mm

8.965 mm

Not Qualified

e0

8.965 mm

10K

MC10166P

Onsemi

MAGNITUDE COMPARATOR

OTHER

THROUGH-HOLE

16

DIP

RECTANGULAR

PLASTIC/EPOXY

NO

1

ECL

5

-5.2

IN-LINE

DIP16,.3

7.6 ns

Arithmetic Circuits

2.54 mm

85 Cel

-30 Cel

TIN LEAD

DUAL

R-PDIP-T16

4.44 mm

7.62 mm

Not Qualified

TRUE

e0

235

19.175 mm

10K

MC10E193FNR2

Onsemi

ERROR DETECTION AND CORRECTION CIRCUIT

OTHER

J BEND

28

QCCJ

SQUARE

PLASTIC/EPOXY

YES

1

ECL

8

5

-5.2

CHIP CARRIER

LDCC28,.5SQ

1.15 ns

Arithmetic Circuits

1.27 mm

85 Cel

OPEN-EMITTER

0 Cel

TIN LEAD

QUAD

S-PQCC-J28

5.7 V

4.57 mm

11.505 mm

Not Qualified

4.2 V

NECL MODE: VCC=0 WITH VEE= -4.2V TO -5.7V

e0

11.505 mm

10E

MC100E160FNR2

Onsemi

PARITY GENERATOR/CHECKER

OTHER

J BEND

28

QCCJ

SQUARE

PLASTIC/EPOXY

YES

1

ECL

12

5

-4.5

CHIP CARRIER

LDCC28,.5SQ

.7 ns

Arithmetic Circuits

1.27 mm

85 Cel

OPEN-EMITTER

0 Cel

Tin/Lead (Sn80Pb20)

QUAD

S-PQCC-J28

1

5.7 V

4.57 mm

11.505 mm

Not Qualified

COMPLEMENTARY

4.2 V

NECL MODE: VCC=0 WITH VEE= -4.2V TO -5.7V

e0

11.505 mm

100E

HD10181F

Renesas Electronics

ARITHMETIC LOGIC UNIT

OTHER

FLAT

24

QFF

SQUARE

CERAMIC, METAL-SEALED COFIRED

YES

1

ECL

4

FLATPACK

11.9 ns

1.27 mm

85 Cel

OPEN-EMITTER

-30 Cel

QUAD

S-CQFP-F24

2.38 mm

9.78 mm

Not Qualified

CAPABLE OF 16 LOGIC & ARITHMETIC OPERATIONS; INTERNAL RIPPLE CARRY; HIGHER ORDER LOOKAHEAD

9.78 mm

10K

Digital Arithmetic Circuits

Digital arithmetic circuits are electronic circuits designed to perform arithmetic operations on digital signals. These circuits are essential components of digital systems, such as microprocessors, digital signal processors, and programmable logic devices.

Digital arithmetic circuits can perform various arithmetic operations, including addition, subtraction, multiplication, division, and modulo arithmetic. These operations are performed using binary arithmetic, where numbers are represented using the binary number system (0s and 1s).

Adders are one of the most commonly used digital arithmetic circuits. They are used to perform binary addition, where two binary numbers are added to produce a sum. Adders can be designed using various techniques, including ripple carry adders, carry look-ahead adders, and carry select adders.

Subtractors are also commonly used digital arithmetic circuits. They are used to perform binary subtraction, where one binary number is subtracted from another to produce a difference. Subtractors can be designed using techniques, including ripple borrow subtractors, borrow look-ahead subtractors, and borrow select subtractors.

Multiplexers and demultiplexers are digital circuits that can be used for various arithmetic operations, such as multiplication and division. Multiplexers can be used to select one of several input signals based on a control signal, while demultiplexers can be used to distribute a single input signal to several outputs based on a control signal.

Digital arithmetic circuits can also be designed using programmable logic devices, such as field-programmable gate arrays (FPGAs) and complex programmable logic devices (CPLDs). These devices can be programmed to implement various arithmetic operations and can be reprogrammed to adapt to changing system requirements.