Part | RoHS | Manufacturer | Memory IC Type | Temperature Grade | No. of Terminals | Package Code | Package Shape | Total Dose (V) | Package Body Material | Surface Mount | Cycle Time | No. of Functions | Technology | Screening Level | Terminal Form | Parallel or Serial | Operating Mode | Maximum Supply Current | No. of Words | Nominal Supply Voltage / Vsup (V) | Power Supplies (V) | Memory Width | Package Style (Meter) | Package Equivalence Code | Alternate Memory Width | Sub-Category | Terminal Pitch | Maximum Operating Temperature | Output Characteristics | Organization | No. of Words Code | Minimum Operating Temperature | Terminal Finish | Terminal Position | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Supply Voltage (Vsup) | Maximum Seated Height | Maximum Clock Frequency (fCLK) | Width | Qualification | Memory Density | Minimum Supply Voltage (Vsup) | Additional Features | JESD-609 Code | Maximum Time At Peak Reflow Temperature (s) | Peak Reflow Temperature (C) | Output Enable | Maximum Standby Current | Length | Maximum Access Time |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
Renesas Electronics |
INDUSTRIAL |
100 |
LBGA |
SQUARE |
PLASTIC/EPOXY |
YES |
7.5 ns |
1 |
CMOS |
BALL |
PARALLEL |
SYNCHRONOUS |
131072 words |
3.3 |
18 |
GRID ARRAY, LOW PROFILE |
1 mm |
85 Cel |
128KX18 |
128K |
-40 Cel |
TIN SILVER COPPER |
BOTTOM |
S-PBGA-B100 |
3 |
3.45 V |
1.5 mm |
11 mm |
Not Qualified |
2359296 bit |
3.15 V |
CAN ALSO BE CONFIGURED AS 262,144 X 9 |
e1 |
YES |
11 mm |
5 ns |
||||||||||||||
|
Renesas Electronics |
INDUSTRIAL |
100 |
LBGA |
SQUARE |
PLASTIC/EPOXY |
YES |
7.5 ns |
1 |
CMOS |
BALL |
PARALLEL |
SYNCHRONOUS |
262144 words |
3.3 |
18 |
GRID ARRAY, LOW PROFILE |
1 mm |
85 Cel |
256KX18 |
256K |
-40 Cel |
TIN SILVER COPPER |
BOTTOM |
S-PBGA-B100 |
3 |
3.45 V |
1.5 mm |
11 mm |
Not Qualified |
4718592 bit |
3.15 V |
CAN ALSO BE CONFIGURED AS 524,288 X 9 |
e1 |
YES |
11 mm |
5 ns |
||||||||||||||
|
Renesas Electronics |
OTHER FIFO |
INDUSTRIAL |
100 |
BGA |
SQUARE |
PLASTIC/EPOXY |
YES |
7.5 ns |
1 |
CMOS |
BALL |
PARALLEL |
SYNCHRONOUS |
131072 words |
3.3 |
18 |
GRID ARRAY |
85 Cel |
128KX18 |
128K |
-40 Cel |
TIN SILVER COPPER |
BOTTOM |
S-PBGA-B100 |
3 |
3.45 V |
2359296 bit |
3.15 V |
AUTO POWER DOWN; RETRANSMIT; IT CAN ALSO BE CONFIGURED AS 256K X 9; ASYNCHRONOUS MODE ALSO POSSIBLE |
e1 |
30 |
260 |
YES |
5 ns |
||||||||||||||||
Renesas Electronics |
OTHER FIFO |
COMMERCIAL |
100 |
BGA |
SQUARE |
PLASTIC/EPOXY |
YES |
CMOS |
BALL |
SYNCHRONOUS/ASYNCHRONOUS |
35 mA |
131072 words |
3.3 |
3.3 |
18 |
GRID ARRAY |
BGA100,10X10,40 |
9 |
FIFOs |
1 mm |
70 Cel |
128KX18 |
128K |
0 Cel |
TIN LEAD |
BOTTOM |
S-PBGA-B100 |
3 |
83 MHz |
Not Qualified |
2359296 bit |
e0 |
30 |
225 |
.015 Amp |
10 ns |
|||||||||||||||
|
Renesas Electronics |
INDUSTRIAL |
100 |
LBGA |
SQUARE |
PLASTIC/EPOXY |
YES |
7.5 ns |
1 |
CMOS |
BALL |
PARALLEL |
SYNCHRONOUS |
512 words |
3.3 |
18 |
GRID ARRAY, LOW PROFILE |
1 mm |
85 Cel |
512X18 |
512 |
-40 Cel |
TIN SILVER COPPER |
BOTTOM |
S-PBGA-B100 |
3 |
3.45 V |
1.5 mm |
11 mm |
Not Qualified |
9216 bit |
3.15 V |
IT CAN ALSO BE CONFIGURED AS 1K X 9 |
e1 |
YES |
11 mm |
5 ns |
||||||||||||||
|
Renesas Electronics |
OTHER FIFO |
COMMERCIAL |
100 |
LBGA |
SQUARE |
PLASTIC/EPOXY |
YES |
7.5 ns |
1 |
CMOS |
BALL |
PARALLEL |
SYNCHRONOUS |
35 mA |
16384 words |
3.3 |
3.3 |
18 |
GRID ARRAY, LOW PROFILE |
BGA100,10X10,40 |
9 |
FIFOs |
1 mm |
70 Cel |
16KX18 |
16K |
0 Cel |
Tin/Silver/Copper (Sn/Ag/Cu) |
BOTTOM |
S-PBGA-B100 |
3 |
3.45 V |
1.5 mm |
133.3 MHz |
11 mm |
Not Qualified |
294912 bit |
3.15 V |
IT CAN ALSO BE CONFIGURED AS 32K X 9; RETRANSMIT; ASYNCHRONOUS MODE IS ALSO POSSIBLE |
e1 |
30 |
260 |
YES |
.015 Amp |
11 mm |
5 ns |
||||
|
Renesas Electronics |
INDUSTRIAL |
100 |
LBGA |
SQUARE |
PLASTIC/EPOXY |
YES |
7.5 ns |
1 |
CMOS |
BALL |
PARALLEL |
SYNCHRONOUS |
2048 words |
3.3 |
18 |
GRID ARRAY, LOW PROFILE |
1 mm |
85 Cel |
2KX18 |
2K |
-40 Cel |
TIN SILVER COPPER |
BOTTOM |
S-PBGA-B100 |
3 |
3.45 V |
1.5 mm |
11 mm |
Not Qualified |
36864 bit |
3.15 V |
IT CAN ALSO BE CONFIGURED AS 4K X 9 |
e1 |
YES |
11 mm |
5 ns |
||||||||||||||
|
Renesas Electronics |
INDUSTRIAL |
100 |
LBGA |
SQUARE |
PLASTIC/EPOXY |
YES |
7.5 ns |
1 |
CMOS |
BALL |
PARALLEL |
SYNCHRONOUS |
32768 words |
3.3 |
18 |
GRID ARRAY, LOW PROFILE |
1 mm |
85 Cel |
32KX18 |
32K |
-40 Cel |
BOTTOM |
S-PBGA-B100 |
3.45 V |
1.5 mm |
11 mm |
589824 bit |
3.15 V |
IT CAN ALSO BE CONFIGURED AS 64K X 9; RETRANSMIT; ASYNCHRONOUS MODE IS ALSO POSSIBLE |
NOT SPECIFIED |
NOT SPECIFIED |
YES |
11 mm |
5 ns |
||||||||||||||||
|
Renesas Electronics |
OTHER FIFO |
INDUSTRIAL |
100 |
LBGA |
SQUARE |
PLASTIC/EPOXY |
YES |
7.5 ns |
1 |
CMOS |
BALL |
PARALLEL |
SYNCHRONOUS |
35 mA |
262144 words |
3.3 |
3.3 |
18 |
GRID ARRAY, LOW PROFILE |
BGA100,10X10,40 |
9 |
FIFOs |
1 mm |
85 Cel |
256KX18 |
256K |
-40 Cel |
Tin/Silver/Copper (Sn/Ag/Cu) |
BOTTOM |
S-PBGA-B100 |
3 |
3.45 V |
1.5 mm |
133.3 MHz |
11 mm |
Not Qualified |
4718592 bit |
3.15 V |
ALTERNATIVE MEMORY WIDTH 9; ASYNCHRONOUS MODE ALSO POSSIBLE |
e1 |
30 |
260 |
YES |
.015 Amp |
11 mm |
5 ns |
||||
|
Renesas Electronics |
OTHER FIFO |
COMMERCIAL |
100 |
LBGA |
SQUARE |
PLASTIC/EPOXY |
YES |
7.5 ns |
1 |
CMOS |
BALL |
PARALLEL |
SYNCHRONOUS |
35 mA |
1024 words |
3.3 |
3.3 |
18 |
GRID ARRAY, LOW PROFILE |
BGA100,10X10,40 |
9 |
FIFOs |
1 mm |
70 Cel |
1KX18 |
1K |
0 Cel |
Tin/Silver/Copper (Sn/Ag/Cu) |
BOTTOM |
S-PBGA-B100 |
3 |
3.45 V |
1.5 mm |
133.3 MHz |
11 mm |
Not Qualified |
18432 bit |
3.15 V |
IT CAN ALSO BE CONFIGURED AS 2K X 9; RETRANSMIT; ASYNCHRONOUS MODE IS ALSO POSSIBLE |
e1 |
30 |
260 |
YES |
.015 Amp |
11 mm |
5 ns |
FIFO, or First-In, First-Out, is a type of digital circuit that is used in computer systems and digital devices to manage the flow of data. A FIFO circuit stores data in a buffer and retrieves the data in the same order in which it was received, with the first data received being the first data to be retrieved.
FIFO circuits are used in many applications where data needs to be stored and retrieved in a specific order, such as in data communication systems, disk drives, and multimedia devices. For example, in a data communication system, a FIFO circuit can be used to store incoming data packets in a buffer and retrieve them in the order in which they were received, ensuring that the data is processed correctly and in a timely manner.
FIFO circuits are typically implemented using a combination of flip-flops, multiplexers, and control logic. The control logic manages the input and output of data to the FIFO buffer and ensures that the data is stored and retrieved in the correct order.
One of the advantages of using a FIFO circuit is that it provides a simple and efficient way to manage the flow of data. FIFO circuits are easy to implement and can handle large amounts of data. They can also be used in conjunction with other types of digital circuits to implement more complex data processing algorithms.