20 Programmable Logic Devices (PLD) 1,360

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	Surface Mount	Maximum Supply Voltage	Technology Used	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	No. of Outputs	Peak Reflow Temperature (C)	Length	No. of I/O Lines
5962-01-416-8259	Altera	EE PLD	Commercial	Through-Hole	20	DIP	Rectangular	Plastic/Epoxy	45 ns	No		CMOS	18	PAL-TYPE	5	5 V	In-Line	DIP20,.3	Programmable Logic Devices	Macrocell		72	2.54 mm	70 °C (158 °F)			0 °C (32 °F)		Dual	R-PDIP-T20			No			20 MHz	8
EPM5016SC-17	Altera	OT PLD	Commercial	Gull Wing	20	SOP	Rectangular	Plastic/Epoxy	17 ns	Yes	5.25 V	CMOS	16	PAL-TYPE	5	5 V	Small Outline	SOP20,.4	Programmable Logic Devices	Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 8 I/O	7	0 °C (32 °F)	Tin Lead	Dual	R-PDSO-G20	2.65 mm	7.5 mm	No	Macrocells interconnected by PIA; 16 Macrocells; 1 External Clock; Shared Input/Clock	e0	83.3 MHz	8	220 °C (428 °F)	12.8 mm	8
EP320DM-1	Altera	UV PLD	Military	Through-Hole	20	WDIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No	5.5 V	CMOS			5		In-Line, Window			Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	9 Dedicated Inputs, 8 I/O	9	-55 °C (-67 °F)		Dual	R-GDIP-T20	4.826 mm	7.62 mm	No	8 Macrocells; Shared Input/Clock		58.8 MHz			24.003 mm	8
EP320PI-1	Altera	OT PLD	Industrial	Through-Hole	20	DIP	Rectangular	Plastic/Epoxy	25 ns	No	5.5 V	CMOS			5		In-Line			Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	9 Dedicated Inputs, 8 I/O	9	-40 °C (-40 °F)		Dual	R-PDIP-T20		7.62 mm	No	8 Macrocells; Shared Input/Clock		58.8 MHz			26.162 mm	8
5962-01-348-1203	Altera		Commercial	Through-Hole	20	DIP	Rectangular	Ceramic		No		CMOS	18	PAL-TYPE	5	5 V	In-Line	DIP20,.3	Programmable Logic Devices	Macrocell		74	2.54 mm	70 °C (158 °F)			0 °C (32 °F)		Dual	R-XDIP-T20			No			23.8 MHz	8
EP310DC-3	Altera		Commercial	Through-Hole	20	DIP	Rectangular	Ceramic		No		CMOS	18	PAL-TYPE	5	5 V	In-Line	DIP20,.3	Programmable Logic Devices	Macrocell		74	2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Dual	R-XDIP-T20			No		e0	27 MHz	8	220 °C (428 °F)
EPM5016DM-20	Altera		Military	Through-Hole	20	DIP	Rectangular	Ceramic	20 ns	No		CMOS	16	PAL-TYPE	5	5 V	In-Line	DIP20,.3	Programmable Logic Devices			160	2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Dual	R-XDIP-T20			No		e0		8	220 °C (428 °F)
EP330DC-12	Altera		Commercial	Through-Hole	20	DIP	Rectangular	Ceramic	13 ns	No		CMOS	18	PAL-TYPE	5	5 V	In-Line	DIP20,.3	Programmable Logic Devices	Macrocell		72	2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Dual	R-XDIP-T20			No		e0	100 MHz	8	220 °C (428 °F)
EP320IDC-40	Altera	EE PLD	Commercial	Through-Hole	20	DIP	Rectangular	Ceramic	40 ns	No		CMOS	18	PAL-TYPE	5	5 V	In-Line	DIP20,.3	Programmable Logic Devices	Macrocell		72	2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Dual	R-XDIP-T20			No		e0	21.7 MHz	8	220 °C (428 °F)
EPM5016PC-17	Altera	OT PLD	Commercial	Through-Hole	20	DIP	Rectangular	Plastic/Epoxy	17 ns	No	5.25 V	CMOS	16	PAL-TYPE	5	5 V	In-Line	DIP20,.3	Programmable Logic Devices	Macrocell	4.75 V	160	2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 8 I/O	7	0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T20	4.318 mm	7.62 mm	No	Macrocells interconnected by PIA; 16 Macrocells; 1 External Clock; Shared Input/Clock	e0	83.3 MHz	8	220 °C (428 °F)	26.162 mm	8
EP310DMB	Altera		Military	Through-Hole	20	DIP	Rectangular	Ceramic		No		CMOS	18	PAL-TYPE	5	5 V	In-Line	DIP20,.3	Programmable Logic Devices	Macrocell		74	2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Dual	R-XDIP-T20					e0	23.8 MHz	8	220 °C (428 °F)
EPM5016LC-15	Altera	OT PLD	Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy	15 ns	Yes	5.25 V	CMOS	16	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices	Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 8 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20	4.572 mm	9.017 mm	No	Macrocells interconnected by PIA; 16 Macrocells; 1 External Clock; Shared Input/Clock	e0	100 MHz	8	220 °C (428 °F)	9.017 mm	8
EPM5016DI20-20	Altera	UV PLD	Industrial	Through-Hole	20	WDIP	Rectangular	Ceramic, Glass-Sealed	20 ns	No	5.5 V	CMOS			5		In-Line, Window			Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	7 Dedicated Inputs, 8 I/O	7	-40 °C (-40 °F)		Dual	R-GDIP-T20	5.08 mm	7.62 mm	No	16 Macrocells; Shared Input/Clock; Shared Product Terms		62.5 MHz			24.13 mm	8
EP330PC20-15	Altera	OT PLD	Commercial	Through-Hole	20	DIP	Rectangular	Plastic/Epoxy	16 ns	No	5.25 V	CMOS			5		In-Line			Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	9 Dedicated Inputs, 8 I/O	9	0 °C (32 °F)		Dual	R-PDIP-T20	4.318 mm	7.62 mm	No	8 Macrocells; Shared Input/Clock		83.3 MHz			26.162 mm	8
EP320DI	Altera	UV PLD	Industrial	Through-Hole	20	WDIP	Rectangular	Ceramic, Glass-Sealed	45 ns	No	5.5 V	CMOS	18	PAL-TYPE	5	5 V	In-Line, Window	DIP20,.3	Programmable Logic Devices	Macrocell	4.5 V	72	2.54 mm	85 °C (185 °F)	9 Dedicated Inputs, 8 I/O	9	-40 °C (-40 °F)	Tin Lead	Dual	R-GDIP-T20	4.826 mm	7.62 mm	No	8 Macrocells; Shared Input/Clock	e0	30.3 MHz	8	220 °C (428 °F)	24.003 mm	8
EP320IPC-30	Altera	EE PLD	Commercial	Through-Hole	20	DIP	Rectangular	Plastic/Epoxy	30 ns	No		CMOS	18	PAL-TYPE	5	5 V	In-Line	DIP20,.3	Programmable Logic Devices	Macrocell		72	2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T20			No		e0	28.5 MHz	8	220 °C (428 °F)

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.