280 Programmable Logic Devices (PLD) 82

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	No. of Inputs	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EPM9560GM280-25	Altera	EE PLD	Military	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	25 ns		No	5.5 V		CMOS		5		Grid Array				Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 216 I/O	0	-55 °C (-67 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	560 Macrocells; 772 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		66.7 MHz			49.78 mm		216
EPM9400GC280-15	Altera	EE PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	16.2 ns		No	5.25 V	400	CMOS		5	3.3/5,5 V	Grid Array	PGA280,19X19	Programmable Logic Devices	Yes	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 180 I/O	0	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	400 Macrocells; 580 Flip Flops Configurable I/O operation with 3.3 V or 5 V	e0	117.6 MHz		220 °C (428 °F)	49.78 mm	Yes	180
EPF81500AGI280-2	Altera	Loadable PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	1.7 ns	1296	No	3.6 V		CMOS	208	3.3	3.3/5,5 V	Grid Array	PGA280,19X19	Field Programmable Gate Arrays		Registered	3 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 208 I/O	4	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	Can also operate at 5 V supply	e0		204	220 °C (428 °F)	49.78 mm		208
EPF81500GC280-3	Altera	Loadable PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired		1296	No	5.25 V		CMOS	208	5	3.3/5,5 V	Grid Array	PGA280,19X19	Field Programmable Gate Arrays		Registered	4.75 V	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 204 I/O	4	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	1500 Flip Flops; 1296 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0		204	220 °C (428 °F)	49.78 mm		204
EPM9480GC280-12	Altera	EE PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	12.8 ns		No	5.25 V		CMOS		5		Grid Array				Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 196 I/O	0	0 °C (32 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	480 Macrocells; 676 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		125 MHz			49.78 mm		196
EPM9400GC280-12	Altera	EE PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	12.6 ns		No	5.25 V	400	CMOS		5	3.3/5,5 V	Grid Array	PGA280,19X19	Programmable Logic Devices	Yes	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 180 I/O	0	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	400 Macrocells; 580 Flip Flops Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz		220 °C (428 °F)	49.78 mm	Yes	180
EPF81500AGC280-4	Altera	Loadable PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	1.9 ns	1296	No	3.6 V		CMOS	208	3.3	3.3/5,5 V	Grid Array	PGA280,19X19	Field Programmable Gate Arrays		Registered	3 V	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 208 I/O	4	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	Can also operate at 5 V supply	e0	357 MHz	204	220 °C (428 °F)	49.78 mm		208
EPF81500AGC280-3	Altera	Loadable PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	1.8 ns	1296	No	3.6 V		CMOS	208	3.3	3.3/5,5 V	Grid Array	PGA280,19X19	Field Programmable Gate Arrays		Registered	3 V	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 208 I/O	4	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	Can also operate at 5 V supply	e0	385 MHz	204	220 °C (428 °F)	49.78 mm		208
EPM9400GM280-12	Altera	EE PLD	Military	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	12 ns		No	5.5 V		CMOS		5		Grid Array				Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 184 I/O	0	-55 °C (-67 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	400 Macrocells; 580 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		118 MHz			49.78 mm		184
EPF81500GM280-3	Altera	Loadable PLD	Military	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS		5		Grid Array				Registered	4.5 V	2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 204 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	1500 Flip Flops; 1296 Logic elements; Configurable I/O operation with 3.3 V or 5 V					49.78 mm		204
EPM9560GI280-20	Altera	EE PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	23.6 ns		No	5.5 V	560	CMOS		5	3.3/5,5 V	Grid Array	PGA280,19X19	Programmable Logic Devices	Yes	Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	0 Dedicated Inputs, 216 I/O	0	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.08 mm	49.78 mm	No	772 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz		220 °C (428 °F)	49.78 mm	Yes	216
EPF81500AGI280-4	Altera	Loadable PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	1.9 ns	1296	No	3.6 V		CMOS	208	3.3	3.3/5,5 V	Grid Array	PGA280,19X19	Field Programmable Gate Arrays		Registered	3 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 208 I/O	4	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	Can also operate at 5 V supply	e0		204	220 °C (428 °F)	49.78 mm		208
EPM9480GC280-20	Altera	EE PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	23.4 ns		No	5.25 V	480	CMOS		5	3.3/5,5 V	Grid Array	PGA280,19X19	Programmable Logic Devices	Yes	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 196 I/O	0	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	480 Macrocells; 676 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz		220 °C (428 °F)	49.78 mm	Yes	196
EPM9560GI280-25	Altera	EE PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	25 ns		No	5.5 V		CMOS		5		Grid Array				Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	0 Dedicated Inputs, 216 I/O	0	-40 °C (-40 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	560 Macrocells; 772 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		66.7 MHz			49.78 mm		216
EPF81500AGI280-3	Altera	Loadable PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	1.8 ns	1296	No	3.6 V		CMOS	208	3.3	3.3/5,5 V	Grid Array	PGA280,19X19	Field Programmable Gate Arrays		Registered	3 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 208 I/O	4	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	Can also operate at 5 V supply	e0	385 MHz	204	220 °C (428 °F)	49.78 mm		208
EPM9480GC280-15	Altera	EE PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	16.4 ns		No	5.25 V	480	CMOS		5	3.3/5,5 V	Grid Array	PGA280,19X19	Programmable Logic Devices	Yes	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 196 I/O	0	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	480 Macrocells; 676 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	117.6 MHz		220 °C (428 °F)	49.78 mm	Yes	196
EPM9480GI280-20	Altera	EE PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	23.4 ns		No	5.5 V	480	CMOS		5	3.3/5,5 V	Grid Array	PGA280,19X19	Programmable Logic Devices	Yes	Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	0 Dedicated Inputs, 196 I/O	0	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	480 Macrocells; 676 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz		220 °C (428 °F)	49.78 mm	Yes	196
EPM9320GC280-20	Altera	EE PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	23 ns		No	5.25 V	320	CMOS		5	3.3/5,5 V	Grid Array	PGA280,19X19	Programmable Logic Devices	Yes	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 168 I/O	0	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz		220 °C (428 °F)	49.78 mm	Yes	168
EPM9400GC280-20	Altera	EE PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	23.2 ns		No	5.25 V	400	CMOS		5	3.3/5,5 V	Grid Array	PGA280,19X19	Programmable Logic Devices	Yes	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 180 I/O	0	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	400 Macrocells; 580 Flip Flops Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz		220 °C (428 °F)	49.78 mm	Yes	180
EPM9320GI280-12	Altera	EE PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	12 ns		No	5.5 V		CMOS		5		Grid Array				Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	0 Dedicated Inputs, 168 I/O	0	-40 °C (-40 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	320 Macrocells; 484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		118 MHz			49.78 mm		168
EPM9560GC280-12	Altera	EE PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	13.4 ns		No	5.25 V		CMOS		5		Grid Array				Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 216 I/O	0	0 °C (32 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	772 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		125 MHz			49.78 mm		216
EPM9320GI280-15	Altera	EE PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	16 ns		No	5.5 V	320	CMOS		5	3.3/5,5 V	Grid Array	PGA280,19X19	Programmable Logic Devices	Yes	Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	0 Dedicated Inputs, 168 I/O	0	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.08 mm	49.78 mm	No	320 Macrocells	e0	117.6 MHz		220 °C (428 °F)	49.78 mm	Yes	168
EPM9320GC280-12	Altera	EE PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	12.8 ns		No	5.25 V	320	CMOS		5	3.3/5,5 V	Grid Array	PGA280,19X19	Programmable Logic Devices	Yes	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 168 I/O	0	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz		220 °C (428 °F)	49.78 mm	Yes	168
EPF81500AGC280-2A	Altera	Loadable PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired			No	3.6 V		CMOS		3.3		Grid Array				Registered	3 V	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 208 I/O	4	0 °C (32 °F)		Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No					220 °C (428 °F)	49.78 mm		208
EPM9320GI280-20	Altera	EE PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	23 ns		No	5.5 V	320	CMOS		5	3.3/5,5 V	Grid Array	PGA280,19X19	Programmable Logic Devices	Yes	Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	0 Dedicated Inputs, 168 I/O	0	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.08 mm	49.78 mm	No	484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz		220 °C (428 °F)	49.78 mm	Yes	168
EPM9560GM280-15	Altera	EE PLD	Military	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	15 ns		No	5.5 V		CMOS		5		Grid Array				Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 216 I/O	0	-55 °C (-67 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	560 Macrocells; 772 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		117.6 MHz			49.78 mm		216
EPM9480GI280-15	Altera	EE PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	15 ns		No	5.5 V		CMOS		5		Grid Array				Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	0 Dedicated Inputs, 200 I/O	0	-40 °C (-40 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	480 Macrocells; 676 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		118 MHz			49.78 mm		200
EPM9480GM280-15	Altera	EE PLD	Military	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	15 ns		No	5.5 V		CMOS		5		Grid Array				Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 200 I/O	0	-55 °C (-67 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	480 Macrocells; 676 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		118 MHz			49.78 mm		200
EPF81500AGC280-2	Altera	Loadable PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	1.7 ns	1296	No	3.6 V		CMOS	208	3.3	3.3/5,5 V	Grid Array	PGA280,19X19	Field Programmable Gate Arrays		Registered	3 V	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 208 I/O	4	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	Can also operate at 5 V supply	e0	417 MHz	204	220 °C (428 °F)	49.78 mm		208
EPM9560GM280-20	Altera	EE PLD	Military	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	20 ns		No	5.5 V		CMOS		5		Grid Array				Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 216 I/O	0	-55 °C (-67 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	560 Macrocells; 772 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		95.2 MHz			49.78 mm		216
EPF81500GC280-2	Altera	Loadable PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired		1296	No	5.25 V		CMOS	208	5	3.3/5,5 V	Grid Array	PGA280,19X19	Field Programmable Gate Arrays		Registered	4.75 V	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 204 I/O	4	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	1500 Flip Flops; 1296 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0		204	220 °C (428 °F)	49.78 mm		204
EPF81500GI280-2	Altera	Loadable PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS		5		Grid Array				Registered	4.5 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 204 I/O	4	-40 °C (-40 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	1500 Flip Flops; 1296 Logic elements; Configurable I/O operation with 3.3 V or 5 V					49.78 mm		204
EPM9560GC280-20	Altera	EE PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	23.6 ns		No	5.25 V	560	CMOS		5	3.3/5,5 V	Grid Array	PGA280,19X19	Programmable Logic Devices	Yes	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 216 I/O	0	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	772 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz		220 °C (428 °F)	49.78 mm	Yes	216
EPM9560GC280-25	Altera	EE PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	25 ns		No	5.25 V		CMOS		5		Grid Array				Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 216 I/O	0	0 °C (32 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	560 Macrocells; 772 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		66.7 MHz			49.78 mm		216

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.