32 Programmable Logic Devices (PLD) 11

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Part RoHS Manufacturer Programmable IC Type Grading Of Temperature Form Of Terminal No. of Terminals Package Code Package Shape Package Body Material Propagation Delay No. of Logic Cells Surface Mount Maximum Supply Voltage No. of Macro Cells Technology Used Screening Level No. of Inputs Architecture Nominal Supply Voltage (V) Packing Method Power Supplies (V) Package Style (Meter) Package Equivalence Code Sub-Category In-System Programmable Output Function Minimum Supply Voltage No. of Product Terms Pitch Of Terminal Maximum Operating Temperature Organization No. of Dedicated Inputs Minimum Operating Temperature Finishing Of Terminal Used Position Of Terminal JESD-30 Code Moisture Sensitivity Level (MSL) Maximum Seated Height Width Qualification Additional Features JESD-609 Code Maximum Clock Frequency Maximum Time At Peak Reflow Temperature (s) No. of Outputs Peak Reflow Temperature (C) Length JTAG Boundary Scan Test No. of I/O Lines

XC2C32A-6QFG32I

Xilinx

Flash PLD

Industrial

No Lead

32

SON

Square

Plastic/Epoxy

6 ns

Yes

1.9 V

32

CMOS

1.8

1.5/3.3,1.8 V

Small Outline

LCC32,.2SQ,20

Programmable Logic Devices

Yes

Macrocell

1.7 V

.5 mm

85 °C (185 °F)

21 I/O

-40 °C (-40 °F)

Matte Tin

Dual

S-PDSO-N32

3

1 mm

5 mm

No

Real Digital Design Technology

e3

300 MHz

30 s

260 °C (500 °F)

5 mm

Yes

21

XC2C32A-6QFG32C

Xilinx

Flash PLD

Commercial

No Lead

32

SON

Square

Plastic/Epoxy

6 ns

Yes

1.9 V

32

CMOS

1.8

1.5/3.3,1.8 V

Small Outline

LCC32,.2SQ,20

Programmable Logic Devices

Yes

Macrocell

1.7 V

.5 mm

70 °C (158 °F)

21 I/O

0 °C (32 °F)

Matte Tin

Dual

S-PDSO-N32

3

1 mm

5 mm

No

Real Digital Design Technology

e3

300 MHz

30 s

260 °C (500 °F)

5 mm

Yes

21

SLG46880-AP

Renesas Electronics

OT PLD

No Lead

32

HVQCCN

Square

Yes

5.5 V

12

AEC-Q100

20

2.5

Chip Carrier, Heat Sink/Slug, Very Thin Profile

LCC32,.2SQ,20

No

Macrocell

2.3 V

.5 mm

125 °C (257 °F)

8 Dedicated Inputs, 12 I/O

8

-40 °C (-40 °F)

Quad

S-XQCC-N32

.8 mm

5 mm

20

5 mm

No

12

SLG46880V

Renesas Electronics

OT PLD

No Lead

32

HVQCCN

Square

Yes

5.5 V

12

18

PLA-TYPE

2.5

Chip Carrier, Heat Sink/Slug, Very Thin Profile

LCC32,.16SQ,16

No

Macrocell

2.3 V

.4 mm

85 °C (185 °F)

2 Dedicated Inputs, 12 I/O

2

-40 °C (-40 °F)

Quad

S-XQCC-N32

1

.6 mm

4 mm

20

4 mm

No

12

SLG46880VTR

Renesas Electronics

OT PLD

No Lead

32

HVQCCN

Square

Yes

5.5 V

12

18

PLA-TYPE

2.5

Box, Tape and Reel, 13 in

Chip Carrier, Heat Sink/Slug, Very Thin Profile

LCC32,.16SQ,16

No

Macrocell

2.3 V

.4 mm

85 °C (185 °F)

2 Dedicated Inputs, 12 I/O

2

-40 °C (-40 °F)

Quad

S-XQCC-N32

1

.6 mm

4 mm

20

4 mm

No

12

ISPGAL22V10AC-5LN

Lattice Semiconductor

EE PLD

No Lead

32

HVQCCN

Square

5 ns

Yes

1.95 V

CMOS

22

PAL-TYPE

1.8

1.8 V

Chip Carrier, Heat Sink/Slug, Very Thin Profile

LCC32(UNSPEC)

Programmable Logic Devices

Macrocell

1.65 V

132

.5 mm

11 Dedicated Inputs, 10 I/O

11

Tin Lead

Quad

S-XQCC-N32

1

1 mm

5 mm

No

e0

143 MHz

10

240 °C (464 °F)

5 mm

10

XC2C32A-4QFG32C

Xilinx

Flash PLD

Commercial

No Lead

32

SON

Square

Plastic/Epoxy

4 ns

Yes

1.9 V

32

CMOS

1.8

1.5/3.3,1.8 V

Small Outline

LCC32,.2SQ,20

Programmable Logic Devices

Yes

Macrocell

1.7 V

.5 mm

70 °C (158 °F)

21 I/O

0 °C (32 °F)

Matte Tin

Dual

S-PDSO-N32

3

1 mm

5 mm

No

Real Digital Design Technology

e3

450 MHz

30 s

260 °C (500 °F)

5 mm

Yes

21

XC2C32A-3QFG32C

Xilinx

Flash PLD

Commercial

No Lead

32

SON

Square

Plastic/Epoxy

3 ns

Yes

1.9 V

CMOS

1.8

Small Outline

Macrocell

1.7 V

70 °C (158 °F)

21 I/O

0 °C (32 °F)

Matte Tin

Dual

S-PDSO-N32

3

No

e3

500 MHz

21

SLG46881V

Renesas Electronics

OT PLD

No Lead

32

HVQCCN

Square

Yes

5.5 V

12

18

PLA-TYPE

2.5

Chip Carrier, Heat Sink/Slug, Very Thin Profile

LCC32,.16SQ,16

No

Macrocell

2.3 V

.4 mm

85 °C (185 °F)

2 Dedicated Inputs, 12 I/O

2

-40 °C (-40 °F)

Quad

S-XQCC-N32

1

.6 mm

4 mm

20

4 mm

No

12

SLG46881VTR

Renesas Electronics

OT PLD

No Lead

32

HVQCCN

Square

Yes

5.5 V

12

18

PLA-TYPE

2.5

Box, Tape and Reel, 13 in

Chip Carrier, Heat Sink/Slug, Very Thin Profile

LCC32,.16SQ,16

No

Macrocell

2.3 V

.4 mm

85 °C (185 °F)

2 Dedicated Inputs, 12 I/O

2

-40 °C (-40 °F)

Quad

S-XQCC-N32

1

.6 mm

4 mm

20

4 mm

No

12

SLG46880-APTR

Renesas Electronics

OT PLD

No Lead

32

HVQCCN

Square

Yes

5.5 V

12

AEC-Q100

20

2.5

Tape and Reel

Chip Carrier, Heat Sink/Slug, Very Thin Profile

LCC32,.2SQ,20

No

Macrocell

2.3 V

.5 mm

125 °C (257 °F)

8 Dedicated Inputs, 12 I/O

8

-40 °C (-40 °F)

Quad

S-XQCC-N32

.8 mm

5 mm

20

5 mm

No

12

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.