40 Programmable Logic Devices (PLD) 119

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Part RoHS Manufacturer Programmable IC Type Grading Of Temperature Form Of Terminal No. of Terminals Package Code Package Shape Package Body Material Propagation Delay No. of Logic Cells Surface Mount Maximum Supply Voltage No. of Macro Cells Technology Used Screening Level No. of Inputs Architecture Nominal Supply Voltage (V) Packing Method Power Supplies (V) Package Style (Meter) Package Equivalence Code Sub-Category In-System Programmable Output Function Minimum Supply Voltage No. of Product Terms Pitch Of Terminal Maximum Operating Temperature Organization No. of Dedicated Inputs Minimum Operating Temperature Finishing Of Terminal Used Position Of Terminal JESD-30 Code Moisture Sensitivity Level (MSL) Maximum Seated Height Width Qualification Additional Features JESD-609 Code Maximum Clock Frequency Maximum Time At Peak Reflow Temperature (s) No. of Outputs Peak Reflow Temperature (C) Length JTAG Boundary Scan Test No. of I/O Lines

EP910DI40-40

Altera

UV PLD

Industrial

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

43 ns

No

5.5 V

CMOS

5

In-Line, Window

Macrocell

4.5 V

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Dual

R-GDIP-T40

5.75 mm

15.24 mm

No

24 Macrocells; 2 External Clocks

32.3 MHz

52.07 mm

24

EP910PC-30T

Altera

OT PLD

Commercial

Through-Hole

40

DIP

Rectangular

Plastic/Epoxy

33 ns

No

5.25 V

CMOS

36

PAL-TYPE

5

5 V

In-Line

DIP40,.6

Programmable Logic Devices

Macrocell

4.75 V

240

2.54 mm

70 °C (158 °F)

12 Dedicated Inputs, 24 I/O

12

0 °C (32 °F)

Tin Lead

Dual

R-PDIP-T40

4.83 mm

15.24 mm

No

Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks

e0

33.3 MHz

24

220 °C (428 °F)

52.425 mm

24

EP910DI-30

Altera

UV PLD

Industrial

Through-Hole

40

DIP

Rectangular

Ceramic, Glass-Sealed

30 ns

No

5.5 V

5

In-Line

Macrocell

4.5 V

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Dual

R-GDIP-T40

No

41.7 MHz

24

EP1210PC

Altera

OT PLD

Commercial

Through-Hole

40

DIP

Rectangular

Plastic/Epoxy

90 ns

No

5.25 V

CMOS

36

PAL-TYPE

5

In-Line

DIP40,.6

Programmable Logic Devices

Macrocell

4.75 V

236

2.54 mm

70 °C (158 °F)

12 Dedicated Inputs, 24 I/O

12

0 °C (32 °F)

Tin Lead

Dual

R-PDIP-T40

4.83 mm

15.24 mm

No

28 Macrocells

e0

17.5 MHz

24

220 °C (428 °F)

52.324 mm

24

EP910PM-40

Altera

OT PLD

Military

Through-Hole

40

DIP

Rectangular

Plastic/Epoxy

43 ns

No

5.5 V

CMOS

5

In-Line

Macrocell

4.5 V

2.54 mm

125 °C (257 °F)

12 Dedicated Inputs, 24 I/O

12

-55 °C (-67 °F)

Dual

R-PDIP-T40

4.445 mm

15.24 mm

No

Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks

25 MHz

52.4256 mm

24

EP910IPC-15

Altera

OT PLD

Commercial

Through-Hole

40

DIP

Rectangular

Plastic/Epoxy

18 ns

No

5.25 V

CMOS

36

PAL-TYPE

5

5 V

In-Line

DIP40,.6

Programmable Logic Devices

Macrocell

4.75 V

240

2.54 mm

70 °C (158 °F)

12 Dedicated Inputs, 24 I/O

12

0 °C (32 °F)

Tin Lead

Dual

R-PDIP-T40

4.826 mm

15.24 mm

No

Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks

e0

66.6 MHz

24

220 °C (428 °F)

52.4256 mm

24

EP1210DM883B

Altera

UV PLD

Military

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

90 ns

No

5.5 V

CMOS

38535Q/M;38534H;883B

36

PAL-TYPE

5

In-Line, Window

DIP40,.6

Programmable Logic Devices

Macrocell

4.5 V

236

2.54 mm

125 °C (257 °F)

12 Dedicated Inputs, 24 I/O

12

-55 °C (-67 °F)

Tin Lead

Dual

R-GDIP-T40

5.715 mm

15.24 mm

No

28 Macrocells

e0

17.5 MHz

24

220 °C (428 °F)

52.07 mm

24

EP910IPI-15

Altera

OT PLD

Industrial

Through-Hole

40

DIP

Rectangular

Plastic/Epoxy

18 ns

No

5.5 V

CMOS

5

In-Line

Macrocell

4.5 V

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Dual

R-PDIP-T40

4.83 mm

15.24 mm

No

Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks

66.6 MHz

52.425 mm

24

EP910DM-40

Altera

UV PLD

Military

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

43 ns

No

5.5 V

CMOS

36

PAL-TYPE

5

5 V

In-Line, Window

DIP40,.6

Programmable Logic Devices

Macrocell

4.5 V

240

2.54 mm

125 °C (257 °F)

12 Dedicated Inputs, 24 I/O

12

-55 °C (-67 °F)

Tin Lead

Dual

R-GDIP-T40

5.588 mm

15.24 mm

No

Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks

e0

25 MHz

24

220 °C (428 °F)

52.07 mm

24

EP910IPI40-12

Altera

OT PLD

Industrial

Through-Hole

40

DIP

Rectangular

Plastic/Epoxy

15 ns

No

5.25 V

CMOS

36

PAL-TYPE

5

5 V

In-Line

DIP40,.6

Programmable Logic Devices

Macrocell

4.75 V

240

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Dual

R-PDIP-T40

4.83 mm

15.24 mm

No

e0

76.9 MHz

24

220 °C (428 °F)

52.425 mm

24

EP900DM

Altera

UV PLD

Military

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

60 ns

No

5.5 V

CMOS

36

PAL-TYPE

5

5 V

In-Line, Window

DIP40,.6

Programmable Logic Devices

Macrocell

4.5 V

240

2.54 mm

125 °C (257 °F)

12 Dedicated Inputs, 24 I/O

12

-55 °C (-67 °F)

Tin Lead

Dual

R-GDIP-T40

5.715 mm

15.24 mm

No

24 Macrocells

e0

20 MHz

24

220 °C (428 °F)

52.07 mm

24

EP1210PI-1

Altera

OT PLD

Industrial

Through-Hole

40

DIP

Rectangular

Plastic/Epoxy

50 ns

No

5.5 V

CMOS

5

In-Line

Macrocell

4.5 V

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Dual

R-PDIP-T40

4.83 mm

15.24 mm

No

28 Macrocells

28.5 MHz

52.324 mm

24

EP910DI40-35

Altera

UV PLD

Industrial

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

38 ns

No

5.5 V

CMOS

36

PAL-TYPE

5

5 V

In-Line, Window

DIP40,.6

Programmable Logic Devices

Macrocell

4.5 V

240

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Dual

R-GDIP-T40

5.75 mm

15.24 mm

No

24 Macrocells; 2 External Clocks

e0

37 MHz

24

220 °C (428 °F)

52.07 mm

24

EPM5127PC-2

Altera

OT PLD

Commercial

Through-Hole

40

DIP

Rectangular

Plastic/Epoxy

No

128

CMOS

5

5 V

In-Line

DIP40,.6

Programmable Logic Devices

No

2.54 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Dual

R-PDIP-T40

No

e0

220 °C (428 °F)

No

EP910PI-35

Altera

OT PLD

Industrial

Through-Hole

40

DIP

Rectangular

Plastic/Epoxy

38 ns

No

5.5 V

CMOS

36

PAL-TYPE

5

5 V

In-Line

DIP40,.6

Programmable Logic Devices

Macrocell

4.5 V

240

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Dual

R-PDIP-T40

4.826 mm

15.24 mm

No

Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks

e0

28.6 MHz

24

220 °C (428 °F)

52.4256 mm

24

EP900DC-3

Altera

UV PLD

Commercial

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

50 ns

No

5.25 V

CMOS

36

PAL-TYPE

5

5 V

In-Line, Window

DIP40,.6

Programmable Logic Devices

Macrocell

4.75 V

240

2.54 mm

70 °C (158 °F)

12 Dedicated Inputs, 24 I/O

12

0 °C (32 °F)

Tin Lead

Dual

R-GDIP-T40

5.715 mm

15.24 mm

No

24 Macrocells

e0

23.8 MHz

24

220 °C (428 °F)

52.07 mm

24

EP910IDI-25

Altera

UV PLD

Industrial

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

28 ns

No

5.5 V

CMOS

5

In-Line, Window

Macrocell

4.5 V

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Dual

R-GDIP-T40

5.75 mm

15.24 mm

No

Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks

40 MHz

52.07 mm

24

EP910DI-40

Altera

UV PLD

Industrial

Through-Hole

40

DIP

Rectangular

Ceramic, Glass-Sealed

43 ns

No

5.5 V

CMOS

36

PAL-TYPE

5

5 V

In-Line

DIP40,.6

Programmable Logic Devices

Macrocell

4.5 V

240

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Dual

R-GDIP-T40

No

Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks

e0

25 MHz

24

220 °C (428 °F)

24

EP900IPC-60

Altera

Commercial

Through-Hole

40

DIP

Rectangular

Plastic/Epoxy

60 ns

No

CMOS

36

PAL-TYPE

5

5 V

In-Line

DIP40,.6

Programmable Logic Devices

Macrocell

240

2.54 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Dual

R-PDIP-T40

No

e0

16.7 MHz

24

220 °C (428 °F)

EP910IDI40-15

Altera

UV PLD

Industrial

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

18 ns

No

5.25 V

CMOS

36

PAL-TYPE

5

5 V

In-Line, Window

DIP40,.6

Programmable Logic Devices

Macrocell

4.75 V

240

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Dual

R-GDIP-T40

5.715 mm

15.24 mm

No

e0

66.6 MHz

24

220 °C (428 °F)

52.07 mm

24

EP910PC40-30T

Altera

OT PLD

Commercial

Through-Hole

40

DIP

Rectangular

Plastic/Epoxy

33 ns

No

5.25 V

CMOS

5

In-Line

Macrocell

4.75 V

2.54 mm

70 °C (158 °F)

12 Dedicated Inputs, 24 I/O

12

0 °C (32 °F)

Dual

R-PDIP-T40

4.445 mm

15.24 mm

No

24 Macrocells; 2 External Clocks

33.3 MHz

52.4256 mm

24

EP1210DI

Altera

UV PLD

Industrial

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

90 ns

No

5.5 V

CMOS

36

PAL-TYPE

5

In-Line, Window

DIP40,.6

Programmable Logic Devices

Macrocell

4.5 V

236

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Dual

R-GDIP-T40

5.715 mm

15.24 mm

No

28 Macrocells

e0

17.5 MHz

24

220 °C (428 °F)

52.07 mm

24

EPM5127PC

Altera

OT PLD

Commercial

Through-Hole

40

DIP

Rectangular

Plastic/Epoxy

No

128

CMOS

5

5 V

In-Line

DIP40,.6

Programmable Logic Devices

No

2.54 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Dual

R-PDIP-T40

No

e0

220 °C (428 °F)

No

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.