Part | RoHS | Manufacturer | Programmable IC Type | Grading Of Temperature | Form Of Terminal | No. of Terminals | Package Code | Package Shape | Package Body Material | Propagation Delay | No. of Logic Cells | Surface Mount | Maximum Supply Voltage | No. of Macro Cells | Technology Used | Screening Level | No. of Inputs | Architecture | Nominal Supply Voltage (V) | Packing Method | Power Supplies (V) | Package Style (Meter) | Package Equivalence Code | Sub-Category | In-System Programmable | Output Function | Minimum Supply Voltage | No. of Product Terms | Pitch Of Terminal | Maximum Operating Temperature | Organization | No. of Dedicated Inputs | Minimum Operating Temperature | Finishing Of Terminal Used | Position Of Terminal | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Seated Height | Width | Qualification | Additional Features | JESD-609 Code | Maximum Clock Frequency | Maximum Time At Peak Reflow Temperature (s) | No. of Outputs | Peak Reflow Temperature (C) | Length | JTAG Boundary Scan Test | No. of I/O Lines |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Atmel |
UV PLD |
Military |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
15 ns |
No |
5.5 V |
CMOS |
22 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
132 |
2.54 mm |
125 °C (257 °F) |
11 Dedicated Inputs, 10 I/O |
11 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
10 Macrocells; 1 External Clock; Shared Input/Clock; Variable Product Terms |
e0 |
50 MHz |
10 |
32 mm |
10 |
|||||||||||
Atmel |
UV PLD |
Military |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
15 ns |
No |
5.5 V |
CMOS |
38535Q/M;38534H;883B |
22 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
132 |
2.54 mm |
125 °C (257 °F) |
11 Dedicated Inputs, 10 I/O |
11 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
10 Macrocells; 1 External Clock; Shared Input/Clock; Variable Product Terms |
e0 |
50 MHz |
10 |
32 mm |
10 |
||||||||||
Atmel |
UV PLD |
Military |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
25 ns |
No |
5.5 V |
10 |
CMOS |
MIL-STD-883 Class B |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
No |
Macrocell |
4.5 V |
2.54 mm |
125 °C (257 °F) |
12 Dedicated Inputs, 10 I/O |
12 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
10 Macrocells; Variable Product Terms |
e0 |
45 MHz |
30 s |
240 °C (464 °F) |
32 mm |
No |
10 |
|||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
40 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
90 ns |
No |
5.25 V |
CMOS |
36 |
PAL-TYPE |
5 |
In-Line, Window |
DIP40,.6 |
Programmable Logic Devices |
Macrocell |
4.75 V |
236 |
2.54 mm |
70 °C (158 °F) |
12 Dedicated Inputs, 24 I/O |
12 |
0 °C (32 °F) |
Tin Lead |
Dual |
R-GDIP-T40 |
5.715 mm |
15.24 mm |
No |
28 Macrocells |
e0 |
17.5 MHz |
24 |
220 °C (428 °F) |
52.07 mm |
24 |
|||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
10 ns |
No |
5.25 V |
CMOS |
22 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
132 |
2.54 mm |
70 °C (158 °F) |
11 Dedicated Inputs, 10 I/O |
11 |
0 °C (32 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
Macrocells Interconnected By Global Bus; 10 Macrocells; 1 External Clock |
e0 |
95.2 MHz |
10 |
220 °C (428 °F) |
32 mm |
10 |
||||||||||
Cypress Semiconductor |
UV PLD |
Military |
Through-Hole |
28 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
25 ns |
No |
5.5 V |
CMOS |
38535Q/M;38534H;883B |
24 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP28,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
320 |
2.54 mm |
125 °C (257 °F) |
7 Dedicated Inputs, 16 I/O |
7 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T28 |
5.08 mm |
7.62 mm |
No |
Macrocells interconnected by PIA; 32 Macrocells; 1 External Clock; Shared Input/Clock |
e0 |
33.3 MHz |
16 |
37.0205 mm |
16 |
||||||||||
Defense Logistics Agency |
UV PLD |
Military |
Through-Hole |
20 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
30 ns |
No |
5.5 V |
CMOS |
5 |
In-Line, Window |
Combinatorial |
4.5 V |
2.54 mm |
125 °C (257 °F) |
10 Dedicated Inputs, 6 I/O |
10 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T20 |
5.08 mm |
7.62 mm |
No |
e0 |
24.13 mm |
6 |
||||||||||||||||||||
Cypress Semiconductor |
UV PLD |
Military |
Through-Hole |
28 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
25 ns |
No |
5.5 V |
CMOS |
38535Q/M;38534H;883B |
23 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP28,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
256 |
2.54 mm |
125 °C (257 °F) |
9 Dedicated Inputs, 12 I/O |
9 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T28 |
5.08 mm |
7.62 mm |
No |
Synchronous State Machine; 12 I/O Macrocells; 3 External Clocks; Shared Input/Clock |
e0 |
40 MHz |
12 |
37.0205 mm |
12 |
||||||||||
Cypress Semiconductor |
UV PLD |
Commercial |
Through-Hole |
28 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
20 ns |
No |
5.25 V |
CMOS |
24 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP28,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
320 |
2.54 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 16 I/O |
7 |
0 °C (32 °F) |
Tin Lead |
Dual |
R-GDIP-T28 |
5.08 mm |
7.62 mm |
No |
Macrocells interconnected by PIA; 32 Macrocells; 1 External Clock; Shared Input/Clock |
e0 |
41.6 MHz |
16 |
37.0205 mm |
16 |
|||||||||||
Altera |
UV PLD |
Industrial |
Through-Hole |
40 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
60 ns |
No |
5.5 V |
CMOS |
36 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP40,.6 |
Programmable Logic Devices |
Macrocell |
4.5 V |
240 |
2.54 mm |
85 °C (185 °F) |
12 Dedicated Inputs, 24 I/O |
12 |
-40 °C (-40 °F) |
Tin Lead |
Dual |
R-GDIP-T40 |
5.715 mm |
15.24 mm |
No |
24 Macrocells |
e0 |
20 MHz |
24 |
220 °C (428 °F) |
52.07 mm |
24 |
||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
20 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
20 ns |
No |
5.25 V |
CMOS |
16 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP20,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
160 |
2.54 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 8 I/O |
7 |
0 °C (32 °F) |
Tin Lead |
Dual |
R-GDIP-T20 |
5.334 mm |
7.62 mm |
No |
Macrocells interconnected by PIA; 16 Macrocells; 1 External Clock; Shared Input/Clock |
e0 |
62.5 MHz |
8 |
220 °C (428 °F) |
24.13 mm |
8 |
||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
28 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
25 ns |
No |
5.25 V |
CMOS |
24 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP28,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
320 |
2.54 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 16 I/O |
7 |
0 °C (32 °F) |
Tin Lead |
Dual |
R-GDIP-T28 |
5.08 mm |
7.62 mm |
No |
Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock |
e0 |
62.5 MHz |
16 |
220 °C (428 °F) |
36.83 mm |
16 |
||||||||||
Cypress Semiconductor |
UV PLD |
Military |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
40 ns |
No |
5.5 V |
CMOS |
38535Q/M;38534H;883B |
22 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
132 |
2.54 mm |
125 °C (257 °F) |
11 Dedicated Inputs, 10 I/O |
11 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
10 Macrocells; 1 External Clock; Shared Input/Clock; Variable Product Terms |
e0 |
18.1 MHz |
10 |
31.877 mm |
10 |
||||||||||
Texas Instruments |
UV PLD |
Industrial |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
30 ns |
No |
5.5 V |
CMOS |
20 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
160 |
2.54 mm |
85 °C (185 °F) |
4 Dedicated Inputs, 16 I/O |
4 |
-40 °C (-40 °F) |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
40 MHz |
16 |
32.005 mm |
16 |
||||||||||||||
Texas Instruments |
UV PLD |
Military |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
30 ns |
No |
5.5 V |
CMOS |
38535Q/M;38534H;883B |
20 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
160 |
2.54 mm |
125 °C (257 °F) |
4 Dedicated Inputs, 16 I/O |
4 |
-55 °C (-67 °F) |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
40 MHz |
16 |
32.005 mm |
16 |
|||||||||||||
Texas Instruments |
UV PLD |
Commercial |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
25 ns |
No |
5.25 V |
CMOS |
20 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
160 |
2.54 mm |
70 °C (158 °F) |
4 Dedicated Inputs, 16 I/O |
4 |
0 °C (32 °F) |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
50 MHz |
16 |
32.005 mm |
16 |
||||||||||||||
NXP Semiconductors |
UV PLD |
Military |
Through-Hole |
20 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
30 ns |
No |
5.5 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.5 V |
2.54 mm |
125 °C (257 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
-55 °C (-67 °F) |
Dual |
R-GDIP-T20 |
5.08 mm |
7.62 mm |
No |
25 MHz |
8 |
||||||||||||||||||||||
Infineon Technologies |
UV PLD |
Military |
Through-Hole |
WDIP |
Ceramic, Glass-Sealed |
10 ns |
No |
5.5 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.5 V |
2.54 mm |
125 °C (257 °F) |
11 Dedicated Inputs, 10 I/O |
11 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
5.08 mm |
7.62 mm |
No |
10 Macrocells; 1 External Clock; Shared Input/Clock; Variable Product Terms |
e0 |
83 MHz |
32 mm |
10 |
|||||||||||||||||||||
Broadcom |
UV PLD |
Military |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
65 ns |
No |
5.5 V |
8 |
CMOS |
26 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
88 |
2.54 mm |
125 °C (257 °F) |
9 Dedicated Inputs, 8 I/O |
9 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
5.3 mm |
7.62 mm |
No |
PAL with Macrocells; 8 Macrocells; 2 External Clocks; Shared Input/Clock |
e0 |
11.1 MHz |
8 |
32.2 mm |
8 |
||||||||||
Altera |
UV PLD |
Industrial |
Through-Hole |
28 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
15 ns |
No |
5.5 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.5 V |
2.54 mm |
85 °C (185 °F) |
7 Dedicated Inputs, 16 I/O |
7 |
-40 °C (-40 °F) |
Dual |
R-GDIP-T28 |
5.08 mm |
7.62 mm |
No |
32 Macrocells |
83.3 MHz |
36.83 mm |
16 |
||||||||||||||||||||
Altera |
UV PLD |
Military |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
15 ns |
No |
5.5 V |
CMOS |
MIL-STD-883 Class B |
5 |
In-Line, Window |
Macrocell |
4.5 V |
2.54 mm |
125 °C (257 °F) |
11 Dedicated Inputs, 10 I/O |
11 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
10 Macrocells; 1 External Clock; Shared Input/Clock; Variable Product Terms |
e0 |
50 MHz |
32 mm |
10 |
|||||||||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
28 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
No |
5.25 V |
CMOS |
5 |
In-Line, Window |
Registered |
4.75 V |
2.54 mm |
70 °C (158 °F) |
8 Dedicated Inputs, 0 I/O |
8 |
0 °C (32 °F) |
Tin Lead |
Dual |
R-GDIP-T28 |
5.334 mm |
7.62 mm |
No |
Stand-Alone Microsequencer |
e0 |
30 MHz |
220 °C (428 °F) |
36.83 mm |
0 |
||||||||||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
20 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
17 ns |
No |
5.25 V |
CMOS |
16 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP20,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
160 |
2.54 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 8 I/O |
7 |
0 °C (32 °F) |
Tin Lead |
Dual |
R-GDIP-T20 |
5.334 mm |
7.62 mm |
No |
Macrocells interconnected by PIA; 16 Macrocells; 1 External Clock; Shared Input/Clock |
e0 |
83.3 MHz |
8 |
220 °C (428 °F) |
24.13 mm |
8 |
||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
20 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
20 ns |
No |
5.25 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.75 V |
2.54 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 8 I/O |
7 |
0 °C (32 °F) |
Dual |
R-GDIP-T20 |
5.08 mm |
7.62 mm |
No |
16 Macrocells; Shared Input/Clock; Shared Product Terms |
62.5 MHz |
24.13 mm |
8 |
||||||||||||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
15 ns |
No |
5.25 V |
CMOS |
22 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
132 |
2.54 mm |
70 °C (158 °F) |
11 Dedicated Inputs, 10 I/O |
11 |
0 °C (32 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
Macrocells Interconnected By Global Bus; 10 Macrocells; 1 External Clock |
e0 |
64.5 MHz |
10 |
220 °C (428 °F) |
32 mm |
10 |
||||||||||
Altera |
UV PLD |
Military |
Through-Hole |
20 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
50 ns |
No |
5.5 V |
CMOS |
38535Q/M;38534H;883B |
18 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP20,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
74 |
2.54 mm |
125 °C (257 °F) |
9 Dedicated Inputs, 8 I/O |
9 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T20 |
4.826 mm |
7.62 mm |
No |
Shared Input/Clock |
e0 |
31.3 MHz |
8 |
220 °C (428 °F) |
24.003 mm |
8 |
|||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
40 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
60 ns |
No |
5.25 V |
CMOS |
36 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP40,.6 |
Programmable Logic Devices |
Macrocell |
4.75 V |
240 |
2.54 mm |
70 °C (158 °F) |
12 Dedicated Inputs, 24 I/O |
12 |
0 °C (32 °F) |
Tin Lead |
Dual |
R-GDIP-T40 |
5.715 mm |
15.24 mm |
No |
24 Macrocells |
e0 |
20 MHz |
24 |
220 °C (428 °F) |
52.07 mm |
24 |
||||||||||
Altera |
UV PLD |
Military |
Through-Hole |
28 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
25 ns |
No |
5.5 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.5 V |
2.54 mm |
125 °C (257 °F) |
7 Dedicated Inputs, 16 I/O |
7 |
-55 °C (-67 °F) |
Dual |
R-GDIP-T28 |
5.08 mm |
7.62 mm |
No |
32 Macrocells; Shared Input/Clock; Shared Product Terms |
50 MHz |
36.83 mm |
16 |
||||||||||||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
32 ns |
No |
5.25 V |
CMOS |
20 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
160 |
2.54 mm |
70 °C (158 °F) |
4 Dedicated Inputs, 16 I/O |
4 |
0 °C (32 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
16 Macrocells; 2 External Clocks |
e0 |
41.7 MHz |
16 |
220 °C (428 °F) |
32 mm |
16 |
||||||||||
Altera |
UV PLD |
Military |
Through-Hole |
28 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
No |
5.5 V |
CMOS |
5 |
In-Line, Window |
Registered |
4.5 V |
2.54 mm |
125 °C (257 °F) |
8 Dedicated Inputs, 0 I/O |
8 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T28 |
5.334 mm |
7.62 mm |
No |
Stand-Alone Microsequencer |
e0 |
20 MHz |
220 °C (428 °F) |
36.83 mm |
0 |
||||||||||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
10 ns |
No |
5.25 V |
CMOS |
20 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
160 |
2.54 mm |
70 °C (158 °F) |
4 Dedicated Inputs, 16 I/O |
4 |
0 °C (32 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
16 Macrocells; 2 External Clocks |
e0 |
125 MHz |
16 |
220 °C (428 °F) |
32 mm |
16 |
||||||||||
Altera |
UV PLD |
Industrial |
Through-Hole |
28 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
25 ns |
No |
5.5 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.5 V |
2.54 mm |
85 °C (185 °F) |
7 Dedicated Inputs, 16 I/O |
7 |
-40 °C (-40 °F) |
Dual |
R-GDIP-T28 |
5.08 mm |
7.62 mm |
No |
32 Macrocells; Shared Input/Clock; Shared Product Terms |
50 MHz |
36.83 mm |
16 |
||||||||||||||||||||
Altera |
UV PLD |
Industrial |
Through-Hole |
20 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
35 ns |
No |
5.5 V |
CMOS |
18 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP20,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
72 |
2.54 mm |
85 °C (185 °F) |
9 Dedicated Inputs, 8 I/O |
9 |
-40 °C (-40 °F) |
Tin Lead |
Dual |
R-GDIP-T20 |
4.826 mm |
7.62 mm |
No |
8 Macrocells; Shared Input/Clock |
e0 |
40 MHz |
8 |
220 °C (428 °F) |
24.003 mm |
8 |
||||||||||
Altera |
UV PLD |
Military |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
37 ns |
No |
5.5 V |
CMOS |
PAL-TYPE |
5 |
In-Line, Window |
Macrocell |
4.5 V |
2.54 mm |
125 °C (257 °F) |
4 Dedicated Inputs, 16 I/O |
4 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks |
e0 |
28.5 MHz |
32 mm |
16 |
|||||||||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
45 ns |
No |
5.25 V |
CMOS |
20 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
160 |
2.54 mm |
70 °C (158 °F) |
4 Dedicated Inputs, 16 I/O |
4 |
0 °C (32 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
4.826 mm |
7.62 mm |
No |
16 Macrocells |
e0 |
26.3 MHz |
16 |
220 °C (428 °F) |
31.9405 mm |
16 |
||||||||||
Altera |
UV PLD |
Military |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
55 ns |
No |
5.5 V |
CMOS |
20 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP24,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
160 |
2.54 mm |
125 °C (257 °F) |
4 Dedicated Inputs, 16 I/O |
4 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
4.826 mm |
7.62 mm |
No |
16 Macrocells |
e0 |
22.2 MHz |
16 |
220 °C (428 °F) |
31.9405 mm |
16 |
||||||||||
Altera |
UV PLD |
Industrial |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
27 ns |
No |
5.5 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.5 V |
2.54 mm |
85 °C (185 °F) |
4 Dedicated Inputs, 16 I/O |
4 |
-40 °C (-40 °F) |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
16 Macrocells; 2 External Clocks |
47.6 MHz |
32 mm |
16 |
||||||||||||||||||||
Altera |
UV PLD |
Military |
Through-Hole |
40 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
60 ns |
No |
5.5 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.5 V |
2.54 mm |
125 °C (257 °F) |
12 Dedicated Inputs, 24 I/O |
12 |
-55 °C (-67 °F) |
Dual |
R-GDIP-T40 |
5.715 mm |
15.24 mm |
No |
24 Macrocells |
20 MHz |
52.07 mm |
24 |
||||||||||||||||||||
Altera |
UV PLD |
Industrial |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
10 ns |
No |
5.25 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.75 V |
2.54 mm |
85 °C (185 °F) |
4 Dedicated Inputs, 16 I/O |
4 |
-40 °C (-40 °F) |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
16 Macrocells; 2 External Clocks |
125 MHz |
32 mm |
16 |
||||||||||||||||||||
Altera |
UV PLD |
Industrial |
Through-Hole |
40 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
25 ns |
No |
5.25 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.75 V |
2.54 mm |
85 °C (185 °F) |
12 Dedicated Inputs, 24 I/O |
12 |
-40 °C (-40 °F) |
Dual |
R-GDIP-T40 |
5.715 mm |
15.24 mm |
No |
62.5 MHz |
52.07 mm |
24 |
|||||||||||||||||||||
Altera |
UV PLD |
Military |
Through-Hole |
20 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
50 ns |
No |
5.5 V |
CMOS |
18 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP20,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
74 |
2.54 mm |
125 °C (257 °F) |
9 Dedicated Inputs, 8 I/O |
9 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T20 |
4.826 mm |
7.62 mm |
No |
Shared Input/Clock |
e0 |
31.3 MHz |
8 |
220 °C (428 °F) |
24.003 mm |
8 |
||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
40 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
12 ns |
No |
5.25 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.75 V |
2.54 mm |
70 °C (158 °F) |
12 Dedicated Inputs, 24 I/O |
12 |
0 °C (32 °F) |
Dual |
R-GDIP-T40 |
5.75 mm |
15.24 mm |
No |
24 Macrocells; 2 External Clocks |
125 MHz |
52.07 mm |
24 |
||||||||||||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Metal-Sealed Cofired |
45 ns |
No |
5.25 V |
5 |
In-Line, Window |
Macrocell |
4.75 V |
2.54 mm |
70 °C (158 °F) |
0 °C (32 °F) |
Tin Lead |
Dual |
R-CDIP-T24 |
4.826 mm |
7.62 mm |
e0 |
26.3 MHz |
220 °C (428 °F) |
31.9405 mm |
|||||||||||||||||||||||
Altera |
UV PLD |
Military |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
37 ns |
No |
5.5 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.5 V |
2.54 mm |
125 °C (257 °F) |
4 Dedicated Inputs, 16 I/O |
4 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks |
e0 |
28.5 MHz |
32 mm |
16 |
||||||||||||||||||
Altera |
UV PLD |
Industrial |
Through-Hole |
20 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
25 ns |
No |
5.5 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.5 V |
2.54 mm |
85 °C (185 °F) |
9 Dedicated Inputs, 8 I/O |
9 |
-40 °C (-40 °F) |
Dual |
R-GDIP-T20 |
4.826 mm |
7.62 mm |
No |
8 Macrocells; Shared Input/Clock |
58.8 MHz |
24.003 mm |
8 |
||||||||||||||||||||
Altera |
UV PLD |
Military |
Through-Hole |
24 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
15 ns |
No |
5.5 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.5 V |
2.54 mm |
125 °C (257 °F) |
11 Dedicated Inputs, 10 I/O |
11 |
-55 °C (-67 °F) |
Dual |
R-GDIP-T24 |
5.08 mm |
7.62 mm |
No |
10 Macrocells; 1 External Clock; Shared Input/Clock; Variable Product Terms |
50 MHz |
32 mm |
10 |
||||||||||||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
28 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
10 ns |
No |
5.25 V |
CMOS |
24 |
PAL-TYPE |
5 |
5 V |
In-Line, Window |
DIP28,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
320 |
2.54 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 16 I/O |
7 |
0 °C (32 °F) |
Tin Lead |
Dual |
R-GDIP-T28 |
5.08 mm |
7.62 mm |
No |
Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock |
e0 |
125 MHz |
16 |
220 °C (428 °F) |
36.83 mm |
16 |
||||||||||
Altera |
UV PLD |
Commercial |
Through-Hole |
20 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
17 ns |
No |
5.25 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.75 V |
2.54 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 8 I/O |
7 |
0 °C (32 °F) |
Dual |
R-GDIP-T20 |
5.08 mm |
7.62 mm |
No |
16 Macrocells; Shared Input/Clock; Shared Product Terms |
83.3 MHz |
24.13 mm |
8 |
Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.
PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.
PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.