Altera - EP2A40B724I8N

The Xilinx XC2C32A-4CP56C is a 32 macrocell FLASH PLD with 33 I/O lines, operating at up to 450 MHz. It features a propagation delay of 4 ns and can be in-system programmable. This low-profile, fine-pitch device is ideal for applications requiring fast clock frequencies and high I/O count in commercial temperature environments.

LOADABLE PLD; Grading Of Temperature: COMMERCIAL; Form Of Terminal: GULL WING; No. of Terminals: 208; Package Code: FQFP; Package Shape: SQUARE;

LC4256V-5TN100I by Lattice Semiconductor is a 3.3V EE PLD with 256 macro cells, 74 inputs, and 64 I/O lines. With a propagation delay of 5ns and max clock frequency of 156MHz, it's ideal for applications requiring fast processing speeds in programmable logic devices. The device is surface mountable and features JTAG boundary scan test capability for efficient testing processes.

LC4256ZE-5TN100C by Lattice Semiconductor is a 256 macrocell EE PLD with 64 I/O lines, 149 MHz clock frequency, and 5.8 ns propagation delay. Ideal for applications requiring in-system programmability and JTAG boundary scan testing in a compact square package with GULL WING terminals.

The EPM7064STC44-10N by Altera is a Programmable Logic Device (PLD) with 64 macro cells. It has a maximum clock frequency of 125 MHz and a propagation delay of 10 ns. This PLD is surface mountable and operates at a nominal supply voltage of 5V. It is commonly used for in-system programmable applications.

EE PLD; Grading Of Temperature: COMMERCIAL; Form Of Terminal: GULL WING; No. of Terminals: 44; Package Code: LQFP; Package Shape: SQUARE;

The Xilinx XC2C32A-6QFG32C is a 32 macrocell FLASH PLD with 6 ns propagation delay and 300 MHz max clock frequency. Ideal for applications requiring in-system programmability, it operates at temperatures ranging from 0 to 70°C and supports JTAG boundary scan testing.

M4A5-64/32-55VNC48 by Lattice Semiconductor is a 64 macrocell EE PLD with 34 inputs and 32 I/O lines. It features a propagation delay of 5.5 ns, max clock frequency of 105 MHz, and operates at temperatures ranging from 0 to 70°C. Ideal for applications requiring programmable logic devices in commercial-grade environments.

FLASH PLD; Grading Of Temperature: OTHER; Form Of Terminal: GULL WING; No. of Terminals: 100; Package Code: TFQFP; Package Shape: SQUARE;

LOADABLE PLD; Grading Of Temperature: COMMERCIAL; Form Of Terminal: GULL WING; No. of Terminals: 240; Package Code: FQFP; Package Shape: SQUARE;

FLASH PLD; Grading Of Temperature: INDUSTRIAL; Form Of Terminal: BALL; No. of Terminals: 256; Package Code: LBGA; Package Shape: SQUARE;

The Intel EPM240M100C5N is a FLASH PLD with 192 macro cells, 80 inputs/outputs, and 7.5 ns propagation delay. It uses CMOS technology, operates at a max temp of 85°C, and has JTAG boundary scan test capability. Ideal for applications requiring programmable logic devices with fast signal processing and high I/O count in compact form factors.

The EPM1270T144C3N by Altera is a programmable logic device (PLD) with 980 macro cells. It has a propagation delay of 6.2 ns and can operate at a maximum supply voltage of 2.625 V. This device is surface mountable and uses CMOS technology. Its package shape is square with gull wing terminals. It is an in-system programmable flash PLD with a minimum supply voltage of 2.375 V. The EPM1270T144C3N is commonly used for applications that require the output function of a macrocell, such as digital signal processing and control systems.

Intel's 5M1270ZT144A5N is a PLD with 980 macro cells, 10ns propagation delay, and CMOS technology. Ideal for industrial applications due to its AEC-Q100 screening level and wide operating temperature range from -40°C to 105°C. Supports JTAG boundary scan test and in-system programmability for versatile use cases.

M4A5-64/32-10VNI by Lattice Semiconductor is a 64 macrocell EE PLD with 34 inputs and 32 I/O lines. It operates at a max clock frequency of 62.5 MHz, making it suitable for industrial applications requiring fast processing speeds. With in-system programmability and JTAG boundary scan test capability, this PLD offers flexibility and ease of testing during development.

EE PLD; Grading Of Temperature: COMMERCIAL; Form Of Terminal: THROUGH-HOLE; No. of Terminals: 24; Package Code: DIP; Package Shape: RECTANGULAR;

LOADABLE PLD; Grading Of Temperature: COMMERCIAL; Form Of Terminal: BALL; No. of Terminals: 256; Package Code: BGA; Package Shape: SQUARE;

FLASH PLD; Grading Of Temperature: OTHER; Form Of Terminal: GULL WING; No. of Terminals: 144; Package Code: LFQFP; Package Shape: SQUARE;

EPM3064ATI100-10N by Intel is a 64 macrocell EE PLD with 10 ns propagation delay and 100 MHz max clock frequency. Ideal for industrial applications, it features in-system programmability, 66 I/O lines, and JTAG boundary scan test capability.

LC4032ZC-5TN48I by Lattice Semiconductor is a 32 macrocell EE PLD with 36 inputs and 32 I/O lines. Featuring a propagation delay of 5 ns, it operates at a max clock frequency of 156 MHz. Ideal for applications requiring in-system programmability and JTAG boundary scan testing in a compact square package.