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| Manufacturer | Altera |
|---|---|
| Manufacturer's Part Number | EP910IDC-15 |
| Description | UV PLD; Grading Of Temperature: COMMERCIAL; Form Of Terminal: THROUGH-HOLE; No. of Terminals: 40; Package Code: DIP; Package Shape: RECTANGULAR; |
| Datasheet | EP910IDC-15 Datasheet |
| In Stock | 788 |
| NAME | DESCRIPTION |
|---|---|
| Minimum Supply Voltage: | 4.75 V |
| Package Body Material: | Ceramic, Glass-Sealed |
| Propagation Delay: | 18 ns |
| Organization: | 12 Dedicated Inputs, 24 I/O |
| No. of Inputs: | 36 |
| Sub-Category: | Programmable Logic Devices |
| Surface Mount: | No |
| No. of Outputs: | 24 |
| Position Of Terminal: | Dual |
| No. of Terminals: | 40 |
| No. of I/O Lines: | 24 |
| Package Style (Meter): | In-Line |
| JESD-30 Code: | R-GDIP-T40 |
| Maximum Clock Frequency: | 66.6 MHz |
| Package Shape: | Rectangular |
| Maximum Operating Temperature: | 70 °C (158 °F) |
| Package Code: | DIP |
| No. of Dedicated Inputs: | 12 |
| Grading Of Temperature: | Commercial |
| Programmable IC Type: | UV PLD |
| Maximum Supply Voltage: | 5.25 V |
| Architecture: | PAL-TYPE |
| No. of Product Terms: | 240 |
| Nominal Supply Voltage (V): | 5 |
| Technology Used: | CMOS |
| JESD-609 Code: | e0 |
| Minimum Operating Temperature: | 0 °C (32 °F) |
| Qualification: | No |
| Package Equivalence Code: | DIP40,.6 |
| Finishing Of Terminal Used: | Tin Lead |
| Form Of Terminal: | Through-Hole |
| Additional Features: | Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks |
| Output Function: | Macrocell |
| Pitch Of Terminal: | 2.54 mm |
| Peak Reflow Temperature (C): | 220 °C (428 °F) |
| Power Supplies (V): | 5 V |









