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| Manufacturer | Altera |
|---|---|
| Manufacturer's Part Number | EPM5128LI-2 |
| Description | OT PLD; Grading Of Temperature: INDUSTRIAL; Form Of Terminal: J BEND; No. of Terminals: 68; Package Code: QCCJ; Package Shape: SQUARE; |
| Datasheet | EPM5128LI-2 Datasheet |
| In Stock | 869 |
| NAME | DESCRIPTION |
|---|---|
| Minimum Supply Voltage: | 4.5 V |
| Package Body Material: | Plastic/Epoxy |
| Propagation Delay: | 45 ns |
| Organization: | 7 Dedicated Inputs, 52 I/O |
| Sub-Category: | Programmable Logic Devices |
| Surface Mount: | Yes |
| Position Of Terminal: | Quad |
| No. of Terminals: | 68 |
| JTAG Boundary Scan Test: | No |
| No. of I/O Lines: | 52 |
| Package Style (Meter): | Chip Carrier |
| JESD-30 Code: | S-PQCC-J68 |
| Maximum Clock Frequency: | 40 MHz |
| Package Shape: | Square |
| Maximum Operating Temperature: | 85 °C (185 °F) |
| Package Code: | QCCJ |
| No. of Dedicated Inputs: | 7 |
| Grading Of Temperature: | Industrial |
| Programmable IC Type: | OT PLD |
| Maximum Supply Voltage: | 5.5 V |
| Nominal Supply Voltage (V): | 5 |
| Technology Used: | CMOS |
| JESD-609 Code: | e0 |
| Minimum Operating Temperature: | -40 °C (-40 °F) |
| Qualification: | No |
| Package Equivalence Code: | LDCC68,1.0SQ |
| Finishing Of Terminal Used: | Tin Lead |
| Form Of Terminal: | J Bend |
| In-System Programmable: | No |
| Additional Features: | Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock |
| Output Function: | Macrocell |
| Pitch Of Terminal: | 1.27 mm |
| Peak Reflow Temperature (C): | 220 °C (428 °F) |
| No. of Macro Cells: | 128 |
| Power Supplies (V): | 5 V |








