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Manufacturer | Altera |
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Manufacturer's Part Number | EPM7192EGM160-15 |
Description | EE PLD; Grading Of Temperature: MILITARY; Form Of Terminal: PIN/PEG; No. of Terminals: 160; Package Code: PGA; Package Shape: SQUARE; |
Datasheet | EPM7192EGM160-15 Datasheet |
In Stock | 522 |
NAME | DESCRIPTION |
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Package Body Material: | Ceramic, Metal-Sealed Cofired |
Propagation Delay: | 15 ns |
Organization: | 0 Dedicated Inputs |
Maximum Seated Height: | 5.34 mm |
Sub-Category: | Programmable Logic Devices |
Surface Mount: | No |
Position Of Terminal: | Perpendicular |
No. of Terminals: | 160 |
JTAG Boundary Scan Test: | No |
Package Style (Meter): | Grid Array |
JESD-30 Code: | S-CPGA-P160 |
Maximum Clock Frequency: | 76.9 MHz |
Package Shape: | Square |
Maximum Operating Temperature: | 125 °C (257 °F) |
Package Code: | PGA |
Width: | 39.624 mm |
No. of Dedicated Inputs: | 0 |
Grading Of Temperature: | Military |
Programmable IC Type: | EE PLD |
Nominal Supply Voltage (V): | 5 |
Technology Used: | CMOS |
JESD-609 Code: | e0 |
Minimum Operating Temperature: | -55 °C (-67 °F) |
Qualification: | No |
Package Equivalence Code: | PGA160M,15X15 |
Finishing Of Terminal Used: | Tin Lead |
Length: | 39.624 mm |
Form Of Terminal: | Pin/Peg |
In-System Programmable: | No |
Additional Features: | 192 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock |
Output Function: | Macrocell |
Pitch Of Terminal: | 2.54 mm |
Peak Reflow Temperature (C): | 220 °C (428 °F) |
No. of Macro Cells: | 192 |
Power Supplies (V): | 3.3/5,5 V |