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Manufacturer | Infineon Technologies |
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Manufacturer's Part Number | 5962-8946804XA |
Description | UV PLD; Grading Of Temperature: MILITARY; Form Of Terminal: PIN/PEG; No. of Terminals: 68; Package Code: WPGA; Package Shape: SQUARE; |
Datasheet | 5962-8946804XA Datasheet |
In Stock | 748 |
NAME | DESCRIPTION |
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Minimum Supply Voltage: | 4.5 V |
Package Body Material: | Ceramic, Metal-Sealed Cofired |
Propagation Delay: | 42 ns |
Organization: | 7 Dedicated Inputs, 52 I/O |
Maximum Seated Height: | 5.08 mm |
Surface Mount: | No |
Position Of Terminal: | Perpendicular |
No. of Terminals: | 68 |
No. of I/O Lines: | 52 |
Package Style (Meter): | Grid Array, Window |
JESD-30 Code: | S-CPGA-P68 |
Maximum Clock Frequency: | 40 MHz |
Package Shape: | Square |
Maximum Operating Temperature: | 125 °C (257 °F) |
Package Code: | WPGA |
Width: | 27.9527 mm |
No. of Dedicated Inputs: | 7 |
Grading Of Temperature: | Military |
Programmable IC Type: | UV PLD |
Maximum Supply Voltage: | 5.5 V |
Nominal Supply Voltage (V): | 5 |
Technology Used: | CMOS |
JESD-609 Code: | e0 |
Minimum Operating Temperature: | -55 °C (-67 °F) |
Qualification: | No |
Finishing Of Terminal Used: | Tin Lead |
Length: | 27.9527 mm |
Form Of Terminal: | Pin/Peg |
Additional Features: | Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock |
Output Function: | Macrocell |
Pitch Of Terminal: | 2.54 mm |