Lattice Semiconductor - LC4512V-75FTN256C

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LC4512V-75FTN256C by Lattice Semiconductor

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Manufacturer Lattice Semiconductor
Manufacturer's Part Number LC4512V-75FTN256C
Description EE PLD; Form Of Terminal: BALL; No. of Terminals: 256; Package Code: LBGA; Package Shape: SQUARE; JTAG Boundary Scan Test: YES;
Datasheet LC4512V-75FTN256C Datasheet
NAME DESCRIPTION
Minimum Supply Voltage: 3 V
Package Body Material: Plastic/Epoxy
Propagation Delay: 7.5 ns
Organization: 4 Dedicated Inputs, 208 I/O
Maximum Time At Peak Reflow Temperature (s): 40 s
Maximum Seated Height: 1.55 mm
No. of Inputs: 212
Sub-Category: Programmable Logic Devices
Surface Mount: Yes
No. of Outputs: 208
Position Of Terminal: Bottom
No. of Terminals: 256
JTAG Boundary Scan Test: Yes
No. of I/O Lines: 208
Package Style (Meter): Grid Array, Low Profile
JESD-30 Code: S-PBGA-B256
Maximum Clock Frequency: 111 MHz
Package Shape: Square
Maximum Operating Temperature: 90 °C (194 °F)
Package Code: LBGA
Width: 17 mm
No. of Dedicated Inputs: 4
Moisture Sensitivity Level (MSL): 3
Programmable IC Type: EE PLD
Maximum Supply Voltage: 3.6 V
Architecture: PAD-TYPE
No. of Product Terms: 83
Nominal Supply Voltage (V): 3.3
JESD-609 Code: e1
Minimum Operating Temperature: 0 °C (32 °F)
Qualification: No
Package Equivalence Code: BGA256,16X16,40
Finishing Of Terminal Used: Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)
Length: 17 mm
Form Of Terminal: Ball
In-System Programmable: Yes
Output Function: Macrocell
Pitch Of Terminal: 1 mm
Peak Reflow Temperature (C): 260 °C (500 °F)
No. of Macro Cells: 512
Power Supplies (V): 3.3 V
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