Micron Technology, Inc - MT18VDDT6472G26

Features:

• Registered inputs with one-clock delay
• Phase-lock loop (PLL) clock driver to reduce loading
• Supports ECC error detection and correction
• VDD = VDDQ = +2.5V
• VDDSPD = +2.3V to +3.6V
• 2.5V I/O (SSTL_2 compatible)
• Commands entered on each positive CK edge
• DQS edge-aligned with data for READs; centeraligned with data for WRITEs
• Internal, pipelined double data rate (DDR) architecture; two data accesses per clock cycle Bidirectional data strobe (DQS) transmitted/received with data i.e., source-synchronous data capture
• Differential clock inputs CK and CK#
• Four internal device banks for concurrent operation
• Programmable burst lengths: 2, 4, or 8
• Auto precharge option
• Auto Refresh and Self Refresh Modes
• 7.8125µs (512MB) maximum average periodic refresh interval
• Serial Presence Detect (SPD) with EEPROM
• Programmable READ CAS latency
• Data Rate: 266 MT/s
• Module Ranks: Single Rank
• Component Count: 18

A superior quality record, and industry-standard formats, our DDR modules offer excellent system-level solutions. Micron continues to work with our customers and the industry to develop innovative designs for future DDR memory solutions.Micron's DDR SDRAM component specifications meet or surpass current JEDEC DDR SDRAM component and Intel's DDR SDRAM component specifications.