Xilinx - XC2064-50PD48C

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XC2064-50PD48C by Xilinx

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Manufacturer Xilinx
Manufacturer's Part Number XC2064-50PD48C
Description FIELD PROGRAMMABLE GATE ARRAY; Grading Of Temperature: COMMERCIAL; Form Of Terminal: THROUGH-HOLE; No. of Terminals: 48; Package Code: DIP; Package Shape: RECTANGULAR;
Datasheet XC2064-50PD48C Datasheet
In Stock357
NAME DESCRIPTION
Minimum Supply Voltage: 4.75 V
Package Body Material: Plastic/Epoxy
Organization: 64 CLBS, 600 Gates
Maximum Combinatorial Delay of a CLB: 15 ns
Maximum Seated Height: 4.826 mm
No. of Inputs: 40
Sub-Category: Field Programmable Gate Arrays
Surface Mount: No
No. of Outputs: 40
Position Of Terminal: Dual
No. of Terminals: 48
No. of Equivalent Gates: 600
Package Style (Meter): In-Line
JESD-30 Code: R-PDIP-T48
Maximum Clock Frequency: 50 MHz
Package Shape: Rectangular
Maximum Operating Temperature: 70 °C (158 °F)
Package Code: DIP
Width: 15.24 mm
Moisture Sensitivity Level (MSL): 1
Grading Of Temperature: Commercial
Programmable IC Type: FPGA
Maximum Supply Voltage: 5.25 V
Nominal Supply Voltage (V): 5
Technology Used: CMOS
No. of Logic Cells: 64
No. of CLBs: 64
JESD-609 Code: e0
Minimum Operating Temperature: 0 °C (32 °F)
Qualification: No
Package Equivalence Code: DIP48,.6
Finishing Of Terminal Used: Tin Lead
Length: 61.7855 mm
Form Of Terminal: Through-Hole
Additional Features: MAX 58 I/OS; 122 flip-flops; typical gates = 600 - 1000
Pitch Of Terminal: 2.54 mm
Power Supplies (V): 5 V
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