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| Manufacturer | Xilinx |
|---|---|
| Manufacturer's Part Number | XC4010XL-3PC84I |
| Description | FIELD PROGRAMMABLE GATE ARRAY; Form Of Terminal: J BEND; No. of Terminals: 84; Package Code: QCCJ; Package Shape: SQUARE; Nominal Supply Voltage (V): 3.3; |
| Datasheet | XC4010XL-3PC84I Datasheet |
| In Stock | 360 |
| NAME | DESCRIPTION |
|---|---|
| Minimum Supply Voltage: | 3 V |
| Package Body Material: | Plastic/Epoxy |
| Organization: | 400 CLBS, 7000 Gates |
| Maximum Time At Peak Reflow Temperature (s): | 30 s |
| Maximum Combinatorial Delay of a CLB: | 1.6 ns |
| Maximum Seated Height: | 5.08 mm |
| No. of Inputs: | 160 |
| Sub-Category: | Field Programmable Gate Arrays |
| Surface Mount: | Yes |
| No. of Outputs: | 160 |
| Position Of Terminal: | Quad |
| No. of Terminals: | 84 |
| No. of Equivalent Gates: | 7000 |
| Package Style (Meter): | Chip Carrier |
| JESD-30 Code: | S-PQCC-J84 |
| Maximum Clock Frequency: | 166 MHz |
| Package Shape: | Square |
| Package Code: | QCCJ |
| Width: | 29.3116 mm |
| Moisture Sensitivity Level (MSL): | 3 |
| Programmable IC Type: | FPGA |
| Maximum Supply Voltage: | 3.6 V |
| Nominal Supply Voltage (V): | 3.3 |
| Technology Used: | CMOS |
| No. of Logic Cells: | 400 |
| No. of CLBs: | 400 |
| JESD-609 Code: | e0 |
| Qualification: | No |
| Package Equivalence Code: | LDCC84,1.2SQ |
| Finishing Of Terminal Used: | Tin/Lead (Sn85Pb15) |
| Length: | 29.3116 mm |
| Form Of Terminal: | J Bend |
| Additional Features: | Max usable 10000 Logic gates |
| Pitch Of Terminal: | 1.27 mm |
| Peak Reflow Temperature (C): | 225 °C (437 °F) |
| Power Supplies (V): | 3.3 V |









