Xilinx - XC40110XV-9BG352I

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XC40110XV-9BG352I by Xilinx

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Manufacturer Xilinx
Manufacturer's Part Number XC40110XV-9BG352I
Description FIELD PROGRAMMABLE GATE ARRAY; Form Of Terminal: BALL; No. of Terminals: 352; Package Code: LBGA; Package Shape: SQUARE; Maximum Combinatorial Delay of a CLB: 1.2 ns;
Datasheet XC40110XV-9BG352I Datasheet
In Stock348
NAME DESCRIPTION
Minimum Supply Voltage: 2.3 V
Package Body Material: Plastic/Epoxy
Organization: 4096 CLBS, 75000 Gates
Maximum Combinatorial Delay of a CLB: 1.2 ns
Maximum Seated Height: 1.7 mm
Surface Mount: Yes
Position Of Terminal: Bottom
No. of Terminals: 352
No. of Equivalent Gates: 75000
Package Style (Meter): Grid Array, Low Profile
JESD-30 Code: S-PBGA-B352
Maximum Clock Frequency: 188 MHz
Package Shape: Square
Package Code: LBGA
Width: 35 mm
Moisture Sensitivity Level (MSL): 3
Programmable IC Type: FPGA
Maximum Supply Voltage: 2.7 V
Nominal Supply Voltage (V): 2.5
Technology Used: CMOS
No. of CLBs: 4096
JESD-609 Code: e0
Qualification: No
Finishing Of Terminal Used: Tin Lead
Length: 35 mm
Form Of Terminal: Ball
Pitch Of Terminal: 1.27 mm
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