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| Manufacturer | Xilinx |
|---|---|
| Manufacturer's Part Number | XC73144-12PG184C |
| Description | UV PLD; Grading Of Temperature: COMMERCIAL; Form Of Terminal: PIN/PEG; No. of Terminals: 184; Package Code: PGA; Package Shape: SQUARE; |
| Datasheet | XC73144-12PG184C Datasheet |
| In Stock | 454 |
| NAME | DESCRIPTION |
|---|---|
| Minimum Supply Voltage: | 4.75 V |
| Package Body Material: | Ceramic, Metal-Sealed Cofired |
| Propagation Delay: | 30 ns |
| Organization: | 0 Dedicated Inputs, 120 I/O |
| Surface Mount: | No |
| Position Of Terminal: | Perpendicular |
| No. of Terminals: | 184 |
| No. of I/O Lines: | 120 |
| Package Style (Meter): | Grid Array |
| JESD-30 Code: | S-CPGA-P184 |
| Maximum Clock Frequency: | 55.6 MHz |
| Package Shape: | Square |
| Maximum Operating Temperature: | 70 °C (158 °F) |
| Package Code: | PGA |
| No. of Dedicated Inputs: | 0 |
| Grading Of Temperature: | Commercial |
| Programmable IC Type: | UV PLD |
| Maximum Supply Voltage: | 5.25 V |
| Nominal Supply Voltage (V): | 5 |
| Technology Used: | CMOS |
| Minimum Operating Temperature: | 0 °C (32 °F) |
| Qualification: | No |
| Form Of Terminal: | Pin/Peg |
| Additional Features: | 144 Macrocells With Programmable I/O Architecture |
| Output Function: | Macrocell |









