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Manufacturer | Xilinx |
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Manufacturer's Part Number | XC7372-12PC68C |
Description | OT PLD; Grading Of Temperature: COMMERCIAL; Form Of Terminal: J BEND; No. of Terminals: 68; Package Code: QCCJ; Package Shape: SQUARE; |
Datasheet | XC7372-12PC68C Datasheet |
In Stock | 140 |
NAME | DESCRIPTION |
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Minimum Supply Voltage: | 4.75 V |
Package Body Material: | Plastic/Epoxy |
Propagation Delay: | 28 ns |
Organization: | 10 Dedicated Inputs, 25 I/O |
Maximum Seated Height: | 5.08 mm |
Sub-Category: | Programmable Logic Devices |
Surface Mount: | Yes |
Position Of Terminal: | Quad |
No. of Terminals: | 68 |
JTAG Boundary Scan Test: | No |
No. of I/O Lines: | 25 |
Package Style (Meter): | Chip Carrier |
JESD-30 Code: | S-PQCC-J68 |
Maximum Clock Frequency: | 62.5 MHz |
Package Shape: | Square |
Maximum Operating Temperature: | 70 °C (158 °F) |
Package Code: | QCCJ |
Width: | 24.2316 mm |
No. of Dedicated Inputs: | 10 |
Moisture Sensitivity Level (MSL): | 1 |
Grading Of Temperature: | Commercial |
Programmable IC Type: | OT PLD |
Maximum Supply Voltage: | 5.25 V |
Nominal Supply Voltage (V): | 5 |
Technology Used: | CMOS |
Minimum Operating Temperature: | 0 °C (32 °F) |
Qualification: | No |
Package Equivalence Code: | LDCC68,1.0SQ |
Length: | 24.2316 mm |
Form Of Terminal: | J Bend |
In-System Programmable: | No |
Additional Features: | 72 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 3 External Clocks; 126 Flip Flops |
Output Function: | Macrocell |
Pitch Of Terminal: | 1.27 mm |
No. of Macro Cells: | 72 |
Power Supplies (V): | 3.3/5,5 V |