XC7Z030-1FFG484I by Xilinx | Peripheral ICs

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Manufacturer	Xilinx
Manufacturer's Part Number	XC7Z030-1FFG484I
Description	Multifunction Peripherals; Terminal Finish: Tin/Silver/Copper (Sn/Ag/Cu); Maximum Time At Peak Reflow Temperature (s): 30; JESD-609 Code: e1; Peak Reflow Temperature (C): 250; Moisture Sensitivity Level (MSL): 4;
Datasheet	XC7Z030-1FFG484I Datasheet
In Stock	254

NAME	DESCRIPTION
Maximum Time At Peak Reflow Temperature (s):	30
Peak Reflow Temperature (C):	250
Terminal Finish:	Tin/Silver/Copper (Sn/Ag/Cu)
JESD-609 Code:	e1
Moisture Sensitivity Level (MSL):	4

Pricing (USD)

Qty.	Unit Price	Ext. Price
254	-	-

OPERATIONAL AMPLIFIER; Temperature Grade: MILITARY; Terminal Form: WIRE; No. of Terminals: 8; Package Shape: ROUND; Technology: BIPOLAR;

RECTIFIER DIODE; Terminal Position: AXIAL; Terminal Form: WIRE; No. of Terminals: 2; Surface Mount: NO; Package Shape: ROUND;

TRANS VOLTAGE SUPPRESSOR DIODE; Terminal Position: DUAL; Terminal Form: C BEND; No. of Terminals: 2; Surface Mount: YES; Package Shape: RECTANGULAR;

TRANS VOLTAGE SUPPRESSOR DIODE; Terminal Position: DUAL; Terminal Form: C BEND; No. of Terminals: 2; Surface Mount: YES; Package Shape: RECTANGULAR;

RECTIFIER DIODE; Terminal Position: AXIAL; Terminal Form: WIRE; No. of Terminals: 2; Surface Mount: NO; Package Shape: ROUND;

RECTIFIER DIODE; Terminal Position: DUAL; Terminal Form: GULL WING; No. of Terminals: 3; Surface Mount: YES; Package Shape: RECTANGULAR;

RECTIFIER DIODE; Surface Mount: NO; Maximum Forward Voltage (VF): 1 V; JESD-609 Code: e0; Maximum Repetitive Peak Reverse Voltage: 100 V; Terminal Finish: Tin/Lead (Sn/Pb);

STMicroelectronics LD1117S33CTR is a fixed positive single output LDO regulator with a nominal output voltage of 3.3V and max output current of 1.3A. It operates within an input voltage range of 4.75V to 15V, making it suitable for various applications requiring stable voltage regulation in compact designs. The device features low dropout voltage of 1.3V, high temperature operation up to 125°C, and small outline package style for space-constrained PCB layouts.