Part | RoHS | Manufacturer | Programmable IC Type | Grading Of Temperature | Form Of Terminal | No. of Terminals | Package Code | Package Shape | Total Dose (V) | Package Body Material | No. of Logic Cells | Surface Mount | Maximum Supply Voltage | No. of CLBs | Technology Used | Screening Level | No. of Inputs | No. of Equivalent Gates | Nominal Supply Voltage (V) | Packing Method | Power Supplies (V) | Package Style (Meter) | Package Equivalence Code | Sub-Category | Minimum Supply Voltage | Pitch Of Terminal | Maximum Operating Temperature | Maximum Combinatorial Delay of a CLB | Organization | Minimum Operating Temperature | Finishing Of Terminal Used | Position Of Terminal | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Seated Height | Width | Qualification | Additional Features | JESD-609 Code | Maximum Clock Frequency | Maximum Time At Peak Reflow Temperature (s) | No. of Outputs | Peak Reflow Temperature (C) | Length |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Xilinx |
FPGA |
Industrial |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
No |
5.5 V |
144 |
CMOS |
4200 |
5 |
Grid Array |
4.5 V |
2.54 mm |
85 °C (185 °F) |
7 ns |
144 CLBS, 4200 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-PPGA-P132 |
4.191 mm |
37.084 mm |
No |
MAX 96 I/OS; 480 flip-flops; power-down supplier current = 3 µA @ VCC = 3.2 V & T = 25°C |
100 MHz |
37.084 mm |
||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
9 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000; power-down supplier current = 120 µA |
e3 |
70 MHz |
96 |
37.084 mm |
|||||||||
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
Yes |
1.26 V |
192 |
50000 |
1.2 |
Grid Array, Thin Profile, Fine Pitch |
1.14 V |
.5 mm |
85 °C (185 °F) |
192 CLBS, 50000 Gates |
0 °C (32 °F) |
Bottom |
S-PBGA-B132 |
1.1 mm |
8 mm |
No |
8 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
224 |
No |
5.25 V |
224 |
CMOS |
110 |
3500 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
4.1 ns |
224 CLBS, 3500 Gates |
0 °C (32 °F) |
Perpendicular |
S-PPGA-P132 |
1 |
4.191 mm |
37.084 mm |
No |
Typical gates = 3500-4500 |
188 MHz |
110 |
37.084 mm |
|||||||||
|
Xilinx |
FPGA |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
224 |
No |
5.5 V |
224 |
CMOS |
110 |
3500 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
2.7 ns |
224 CLBS, 3500 Gates |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
Typical gates = 3500-4500 |
270 MHz |
110 |
37.084 mm |
||||||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
No |
5.25 V |
224 |
CMOS |
6400 |
5 |
Grid Array |
4.75 V |
2.54 mm |
70 °C (158 °F) |
224 CLBS, 6400 Gates |
0 °C (32 °F) |
Perpendicular |
S-PPGA-P132 |
4.191 mm |
37.084 mm |
No |
MAX 110 I/OS; 688 flip-flops; power-down supplier current = 4 µA @ VCC = 3.2 V & T = 25°C |
50 MHz |
37.084 mm |
|||||||||||||||||
Xilinx |
FPGA |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
144 |
No |
5.25 V |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
1.5 ns |
144 CLBS, 2000 Gates |
Perpendicular |
S-PPGA-P132 |
1 |
4.191 mm |
37.084 mm |
No |
Typical gates = 2000-3000 |
370 MHz |
96 |
37.084 mm |
||||||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
5.25 V |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.25 V |
2.54 mm |
85 °C (185 °F) |
1.75 ns |
144 CLBS, 2000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
323 MHz |
96 |
37.084 mm |
||||||||||
|
Xilinx |
FPGA |
Commercial |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
224 |
No |
5.25 V |
224 |
CMOS |
110 |
4000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
3.3 ns |
224 CLBS, 4000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
MAX 120 I/OS; 688 flip-flops; typical gates = 4000 - 5500 |
230 MHz |
110 |
37.084 mm |
|||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
132 |
HPGA |
Square |
Plastic/Epoxy |
224 |
No |
5.25 V |
224 |
CMOS |
110 |
3500 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
5.1 ns |
224 CLBS, 3500 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-PPGA-P132 |
1 |
4.191 mm |
37.084 mm |
No |
Max usable 4500 Logic gates |
e0 |
113 MHz |
110 |
37.084 mm |
|||||||
|
Xilinx |
FPGA |
Automotive |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
5508 |
Yes |
1.26 V |
612 |
CMOS |
AEC-Q100 |
92 |
250000 |
1.2 |
1.2,1.2/3.3,2.5 V |
Grid Array, Thin Profile, Fine Pitch |
BGA132,14X14,20 |
Field Programmable Gate Arrays |
1.14 V |
.5 mm |
125 °C (257 °F) |
4.88 ns |
612 CLBS, 250000 Gates |
-40 °C (-40 °F) |
Tin Silver Copper |
Bottom |
S-PBGA-B132 |
3 |
1.1 mm |
8 mm |
No |
e1 |
572 MHz |
30 s |
85 |
260 °C (500 °F) |
8 mm |
||||
Xilinx |
FPGA |
Other |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.25 V |
224 |
CMOS |
3500 |
5 |
Grid Array |
4.75 V |
2.54 mm |
85 °C (185 °F) |
5.5 ns |
224 CLBS, 3500 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
688 flip-flops; typical gates = 3500-4500 |
125 MHz |
37.084 mm |
||||||||||||||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
No |
5.5 V |
224 |
CMOS |
6400 |
5 |
Grid Array |
4.5 V |
2.54 mm |
85 °C (185 °F) |
224 CLBS, 6400 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-PPGA-P132 |
4.191 mm |
37.084 mm |
No |
MAX 110 I/OS; 688 flip-flops; power-down supplier current = 4 µA @ VCC = 3.2 V & T = 25°C |
50 MHz |
37.084 mm |
|||||||||||||||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
132 |
HPGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
5.5 V |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
5.1 ns |
144 CLBS, 2000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
Max usable 3000 Logic gates |
113 MHz |
96 |
37.084 mm |
||||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
224 |
No |
5.25 V |
224 |
CMOS |
110 |
3500 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
7 ns |
224 CLBS, 3500 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
688 flip-flops; typical gates = 3500-4500; power-down supplier current = 170 µA |
100 MHz |
110 |
37.084 mm |
|||||||||
|
Xilinx |
FPGA |
Industrial |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
5.5 V |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
9 ns |
144 CLBS, 2000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000; power-down supplier current = 120 µA |
70 MHz |
96 |
37.084 mm |
|||||||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
No |
5.5 V |
224 |
CMOS |
6400 |
5 |
Grid Array |
4.5 V |
2.54 mm |
85 °C (185 °F) |
224 CLBS, 6400 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-PPGA-P132 |
4.191 mm |
37.084 mm |
No |
MAX 110 I/OS; 688 flip-flops; power-down supplier current = 4 µA @ VCC = 3.2 V & T = 25°C |
50 MHz |
37.084 mm |
|||||||||||||||||
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
10476 |
Yes |
1.26 V |
1164 |
CMOS |
92 |
500000 |
1.2 |
1.2,1.2/3.3,2.5 V |
Grid Array, Thin Profile, Fine Pitch |
BGA132,14X14,20 |
Field Programmable Gate Arrays |
1.14 V |
.5 mm |
85 °C (185 °F) |
0.76 ns |
1164 CLBS, 500000 Gates |
0 °C (32 °F) |
Tin Lead |
Bottom |
S-PBGA-B132 |
3 |
1.1 mm |
8 mm |
No |
e0 |
572 MHz |
30 s |
85 |
225 °C (437 °F) |
8 mm |
||||||
|
Xilinx |
FPGA |
Industrial |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
5.5 V |
144 |
CMOS |
96 |
3000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
3.3 ns |
144 CLBS, 3000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
MAX 96 I/OS; 480 flip-flops; typical gates = 3000 - 3700 |
230 MHz |
96 |
37.084 mm |
|||||||||
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
1728 |
Yes |
1.26 V |
192 |
CMOS |
89 |
50000 |
1.2 |
1.2,1.2/3.3,2.5 V |
Grid Array, Thin Profile, Fine Pitch |
BGA132,14X14,20 |
Field Programmable Gate Arrays |
1.14 V |
.5 mm |
85 °C (185 °F) |
0.53 ns |
192 CLBS, 50000 Gates |
0 °C (32 °F) |
Tin/Lead (Sn63Pb37) |
Bottom |
S-PBGA-B132 |
3 |
1.1 mm |
8 mm |
No |
e0 |
725 MHz |
30 s |
89 |
225 °C (437 °F) |
8 mm |
||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
144 |
No |
5.25 V |
144 |
CMOS |
96 |
3000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
3.3 ns |
144 CLBS, 3000 Gates |
0 °C (32 °F) |
Perpendicular |
S-PPGA-P132 |
1 |
3.7338 mm |
37.084 mm |
No |
MAX 96 I/OS; 480 flip-flops; typical gates = 3000 - 3700 |
230 MHz |
96 |
37.084 mm |
|||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
224 |
CMOS |
6400 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
9 ns |
224 CLBS, 6400 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
MAX 110 I/OS; 688 flip-flops; power-down supplier current = 4 µA @ VCC = 3.2 V & T = 25°C |
70 MHz |
37.084 mm |
||||||||||||||||
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
Yes |
1.26 V |
192 |
50000 |
1.2 |
Grid Array, Thin Profile, Fine Pitch |
1.14 V |
.5 mm |
85 °C (185 °F) |
192 CLBS, 50000 Gates |
0 °C (32 °F) |
Bottom |
S-PBGA-B132 |
1.1 mm |
8 mm |
No |
8 mm |
||||||||||||||||||||
|
Xilinx |
FPGA |
Commercial |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
5.25 V |
144 |
CMOS |
96 |
4200 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
144 CLBS, 4200 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
MAX 96 I/OS; 480 flip-flops |
50 MHz |
96 |
37.084 mm |
||||||||||
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
Yes |
1.26 V |
192 |
50000 |
1.2 |
Grid Array, Thin Profile, Fine Pitch |
1.14 V |
.5 mm |
85 °C (185 °F) |
192 CLBS, 50000 Gates |
0 °C (32 °F) |
Bottom |
S-PBGA-B132 |
1.1 mm |
8 mm |
No |
8 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
144 |
CMOS |
2000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
7 ns |
144 CLBS, 2000 Gates |
Matte Tin |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000 |
e3 |
100 MHz |
37.084 mm |
|||||||||||||||||
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
Yes |
1.26 V |
192 |
50000 |
1.2 |
Grid Array, Thin Profile, Fine Pitch |
1.14 V |
.5 mm |
85 °C (185 °F) |
192 CLBS, 50000 Gates |
0 °C (32 °F) |
Bottom |
S-PBGA-B132 |
1.1 mm |
8 mm |
No |
8 mm |
||||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic |
224 |
No |
CMOS |
38535Q/M;38534H;883B |
110 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Perpendicular |
S-XPGA-P132 |
No |
50 MHz |
110 |
||||||||||||||||||
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
Yes |
1.26 V |
192 |
50000 |
1.2 |
Grid Array, Thin Profile, Fine Pitch |
1.14 V |
.5 mm |
85 °C (185 °F) |
192 CLBS, 50000 Gates |
0 °C (32 °F) |
Bottom |
S-PBGA-B132 |
1.1 mm |
8 mm |
No |
8 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
224 |
No |
5.25 V |
224 |
CMOS |
110 |
3500 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
1.5 ns |
224 CLBS, 3500 Gates |
Perpendicular |
S-PPGA-P132 |
1 |
4.191 mm |
37.084 mm |
No |
Typical gates = 3500-4500 |
370 MHz |
110 |
37.084 mm |
||||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.25 V |
144 |
CMOS |
2000 |
5 |
Grid Array |
4.75 V |
2.54 mm |
85 °C (185 °F) |
7 ns |
144 CLBS, 2000 Gates |
0 °C (32 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000 |
e3 |
100 MHz |
37.084 mm |
||||||||||||||
Xilinx |
FPGA |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
144 |
No |
5.5 V |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
2.7 ns |
144 CLBS, 2000 Gates |
Perpendicular |
S-PPGA-P132 |
1 |
4.191 mm |
37.084 mm |
No |
Typical gates = 2000-3000 |
270 MHz |
96 |
37.084 mm |
||||||||||||
|
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
5508 |
Yes |
1.26 V |
612 |
CMOS |
92 |
250000 |
1.2 |
1.2,1.2/3.3,2.5 V |
Grid Array, Thin Profile, Fine Pitch |
BGA132,14X14,20 |
Field Programmable Gate Arrays |
1.14 V |
.5 mm |
85 °C (185 °F) |
0.76 ns |
612 CLBS, 250000 Gates |
0 °C (32 °F) |
Tin Silver Copper |
Bottom |
S-PBGA-B132 |
3 |
1.1 mm |
8 mm |
No |
e1 |
572 MHz |
30 s |
85 |
260 °C (500 °F) |
8 mm |
|||||
|
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
1728 |
Yes |
1.26 V |
192 |
CMOS |
89 |
50000 |
1.2 |
1.2,1.2/3.3,2.5 V |
Grid Array, Thin Profile, Fine Pitch |
BGA132,14X14,20 |
Field Programmable Gate Arrays |
1.14 V |
.5 mm |
85 °C (185 °F) |
0.53 ns |
192 CLBS, 50000 Gates |
0 °C (32 °F) |
Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) |
Bottom |
S-PBGA-B132 |
3 |
1.1 mm |
8 mm |
No |
e1 |
725 MHz |
30 s |
89 |
260 °C (500 °F) |
8 mm |
|||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
224 |
No |
5.25 V |
224 |
CMOS |
110 |
4000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
4.1 ns |
224 CLBS, 4000 Gates |
0 °C (32 °F) |
Perpendicular |
S-PPGA-P132 |
1 |
3.7338 mm |
37.084 mm |
No |
MAX 120 I/OS; 688 flip-flops; typical gates = 4000 - 5500 |
190 MHz |
110 |
37.084 mm |
|||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.25 V |
144 |
CMOS |
4200 |
5 |
Grid Array |
4.75 V |
2.54 mm |
70 °C (158 °F) |
144 CLBS, 4200 Gates |
0 °C (32 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
MAX 96 I/OS; 480 flip-flops; power-down supplier current = 3 µA @ VCC = 3.2 V & T = 25°C |
e3 |
50 MHz |
37.084 mm |
|||||||||||||||
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
Yes |
1.26 V |
192 |
50000 |
1.2 |
Grid Array, Thin Profile, Fine Pitch |
1.14 V |
.5 mm |
85 °C (185 °F) |
192 CLBS, 50000 Gates |
0 °C (32 °F) |
Bottom |
S-PBGA-B132 |
1.1 mm |
8 mm |
No |
8 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
224 |
No |
5.25 V |
224 |
CMOS |
110 |
3500 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
5.5 ns |
224 CLBS, 3500 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-PPGA-P132 |
1 |
3.7338 mm |
37.084 mm |
No |
688 flip-flops; typical gates = 3500-4500; power-down supplier current = 170 µA |
e0 |
125 MHz |
110 |
37.084 mm |
|||||||
Xilinx |
FPGA |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
144 |
No |
5.5 V |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
3.3 ns |
144 CLBS, 2000 Gates |
Perpendicular |
S-PPGA-P132 |
1 |
4.191 mm |
37.084 mm |
No |
Typical gates = 2000-3000 |
227 MHz |
96 |
37.084 mm |
||||||||||||
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
5508 |
Yes |
1.26 V |
612 |
CMOS |
92 |
250000 |
1.2 |
1.2,1.2/3.3,2.5 V |
Grid Array, Thin Profile, Fine Pitch |
BGA132,14X14,20 |
Field Programmable Gate Arrays |
1.14 V |
.5 mm |
85 °C (185 °F) |
0.76 ns |
612 CLBS, 250000 Gates |
0 °C (32 °F) |
Tin Lead |
Bottom |
S-PBGA-B132 |
3 |
1.1 mm |
8 mm |
No |
e0 |
572 MHz |
30 s |
85 |
225 °C (437 °F) |
8 mm |
||||||
Xilinx |
FPGA |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
No |
5.5 V |
224 |
CMOS |
3500 |
5 |
Grid Array |
4.5 V |
2.54 mm |
7 ns |
224 CLBS, 3500 Gates |
Perpendicular |
S-PPGA-P132 |
3.7338 mm |
37.084 mm |
No |
688 flip-flops; typical gates = 3500-4500 |
100 MHz |
37.084 mm |
|||||||||||||||||||
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
Yes |
1.26 V |
192 |
50000 |
1.2 |
Grid Array, Thin Profile, Fine Pitch |
1.14 V |
.5 mm |
85 °C (185 °F) |
192 CLBS, 50000 Gates |
0 °C (32 °F) |
Bottom |
S-PBGA-B132 |
1.1 mm |
8 mm |
No |
8 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
224 |
No |
5.25 V |
224 |
CMOS |
110 |
3500 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
7 ns |
224 CLBS, 3500 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-PPGA-P132 |
1 |
3.7338 mm |
37.084 mm |
No |
688 flip-flops; typical gates = 3500-4500; power-down supplier current = 170 µA |
e0 |
100 MHz |
110 |
37.084 mm |
|||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
224 |
No |
5.25 V |
224 |
CMOS |
110 |
3500 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
3.3 ns |
224 CLBS, 3500 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
Typical gates = 3500-4500 |
227 MHz |
110 |
37.084 mm |
|||||||||
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
5508 |
Yes |
1.26 V |
612 |
CMOS |
92 |
250000 |
1.2 |
1.2,1.2/3.3,2.5 V |
Grid Array, Thin Profile, Fine Pitch |
BGA132,14X14,20 |
Field Programmable Gate Arrays |
1.14 V |
.5 mm |
85 °C (185 °F) |
0.66 ns |
612 CLBS, 250000 Gates |
0 °C (32 °F) |
Tin/Lead (Sn63Pb37) |
Bottom |
S-PBGA-B132 |
3 |
1.1 mm |
8 mm |
No |
e0 |
657 MHz |
30 s |
85 |
225 °C (437 °F) |
8 mm |
||||||
Xilinx |
FPGA |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
Yes |
1.26 V |
192 |
50000 |
1.2 |
Grid Array, Thin Profile, Fine Pitch |
1.14 V |
.5 mm |
192 CLBS, 50000 Gates |
Bottom |
S-PBGA-B132 |
1.1 mm |
8 mm |
No |
8 mm |
|||||||||||||||||||||||
|
Xilinx |
FPGA |
Other |
Ball |
132 |
TFBGA |
Square |
Plastic/Epoxy |
10476 |
Yes |
1.26 V |
1164 |
CMOS |
92 |
500000 |
1.2 |
1.2,1.2/3.3,2.5 V |
Grid Array, Thin Profile, Fine Pitch |
BGA132,14X14,20 |
Field Programmable Gate Arrays |
1.14 V |
.5 mm |
85 °C (185 °F) |
0.76 ns |
1164 CLBS, 500000 Gates |
0 °C (32 °F) |
Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) |
Bottom |
S-PBGA-B132 |
3 |
1.1 mm |
8 mm |
No |
e1 |
572 MHz |
30 s |
85 |
260 °C (500 °F) |
8 mm |
|||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
144 |
No |
CMOS |
96 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
2.54 mm |
85 °C (185 °F) |
-40 °C (-40 °F) |
Perpendicular |
S-PPGA-P132 |
No |
96 |
Field Programmable Gate Arrays (FPGAs) are digital integrated circuits that are programmable by the user to perform specific logic functions. They consist of a matrix of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes FPGAs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.
FPGAs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the FPGA hardware. The resulting configuration data is then loaded onto the FPGA, allowing it to perform the desired logic functions.
FPGAs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.