Other Programmable Logic Devices (PLD) 1,448

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Part RoHS Manufacturer Programmable IC Type Grading Of Temperature Form Of Terminal No. of Terminals Package Code Package Shape Package Body Material Propagation Delay No. of Logic Cells Surface Mount Maximum Supply Voltage No. of Macro Cells Technology Used Screening Level No. of Inputs Architecture Nominal Supply Voltage (V) Packing Method Power Supplies (V) Package Style (Meter) Package Equivalence Code Sub-Category In-System Programmable Output Function Minimum Supply Voltage No. of Product Terms Pitch Of Terminal Maximum Operating Temperature Organization No. of Dedicated Inputs Minimum Operating Temperature Finishing Of Terminal Used Position Of Terminal JESD-30 Code Moisture Sensitivity Level (MSL) Maximum Seated Height Width Qualification Additional Features JESD-609 Code Maximum Clock Frequency Maximum Time At Peak Reflow Temperature (s) No. of Outputs Peak Reflow Temperature (C) Length JTAG Boundary Scan Test No. of I/O Lines

EPM1270GF256C5N

Altera

Flash PLD

Other

Ball

256

BGA

Square

Plastic/Epoxy

10 ns

Yes

1.89 V

980

CMOS

1.8

1.5/3.3,1.8 V

Grid Array

BGA256,16X16,40

Programmable Logic Devices

Yes

Macrocell

1.71 V

1 mm

85 °C (185 °F)

0 Dedicated Inputs, 212 I/O

0

0 °C (32 °F)

Tin Silver Copper

Bottom

S-PBGA-B256

3

2.2 mm

17 mm

No

It can also operate at 3.3 V

e1

30 s

260 °C (500 °F)

17 mm

Yes

212

EP20K100EFC324-2XN

Altera

Loadable PLD

Other

Ball

324

BGA

Square

Plastic/Epoxy

2.02 ns

Yes

1.89 V

CMOS

1.8

Grid Array

Macrocell

1.71 V

1 mm

85 °C (185 °F)

4 Dedicated Inputs, 246 I/O

4

0 °C (32 °F)

Tin Silver Copper

Bottom

S-PBGA-B324

3

3.5 mm

19 mm

No

e1

160 MHz

245 °C (473 °F)

19 mm

246

EP20K100FC324-3X

Altera

Loadable PLD

Other

Ball

324

BGA

Square

Plastic/Epoxy

3.6 ns

Yes

2.625 V

CMOS

2.5

Grid Array

Macrocell

2.375 V

1 mm

85 °C (185 °F)

4 Dedicated Inputs, 252 I/O

4

0 °C (32 °F)

Tin Silver Copper

Bottom

S-PBGA-B324

3

3.5 mm

19 mm

No

e1

220 °C (428 °F)

19 mm

252

5M160ZT100C4

Altera

Flash PLD

Other

Gull Wing

100

TFQFP

Square

Plastic/Epoxy

7.9 ns

Yes

1.89 V

1.8

Flatpack, Thin Profile, Fine Pitch

Macrocell

1.71 V

.5 mm

85 °C (185 °F)

79 I/O

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G100

1.2 mm

14 mm

No

e0

184.1 MHz

14 mm

79

EP20K100FC324-1X

Altera

Loadable PLD

Other

Ball

324

BGA

Square

Plastic/Epoxy

2.5 ns

4160

Yes

2.625 V

CMOS

246

2.5

2.5,2.5/3.3 V

Grid Array

BGA324,18X18,40

Field Programmable Gate Arrays

Macrocell

2.375 V

1 mm

85 °C (185 °F)

4 Dedicated Inputs, 252 I/O

4

0 °C (32 °F)

Tin Lead

Bottom

S-PBGA-B324

3

3.5 mm

19 mm

No

e0

20 s

246

220 °C (428 °F)

19 mm

252

EP20K300ERC240-3X

Altera

Loadable PLD

Other

Gull Wing

240

FQFP

Square

Plastic/Epoxy

Yes

2.625 V

CMOS

2.5

Flatpack, Fine Pitch

Macrocell

2.375 V

.5 mm

85 °C (185 °F)

4 Dedicated Inputs, 152 I/O

4

0 °C (32 °F)

Matte Tin

Quad

S-PQFP-G240

4.1 mm

32 mm

No

e3

160 MHz

220 °C (428 °F)

32 mm

152

EP20K1000CB652C8N

Altera

Loadable PLD

Other

Ball

652

BGA

Square

Plastic/Epoxy

1.79 ns

Yes

1.89 V

1.8

Grid Array

Macrocell

1.71 V

1.27 mm

85 °C (185 °F)

4 Dedicated Inputs, 488 I/O

4

0 °C (32 °F)

Tin/Silver/Copper

Bottom

S-PBGA-B652

3.5 mm

45 mm

No

e1

40 s

245 °C (473 °F)

45 mm

488

EP20K60EQC208-1X

Altera

Loadable PLD

Other

Gull Wing

208

FQFP

Square

Plastic/Epoxy

1.72 ns

2560

Yes

1.89 V

CMOS

140

1.8

1.8,1.8/3.3 V

Flatpack, Fine Pitch

QFP208,1.2SQ,20

Field Programmable Gate Arrays

Macrocell

1.71 V

.5 mm

85 °C (185 °F)

4 Dedicated Inputs, 148 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G208

3

4.1 mm

28 mm

No

e0

160 MHz

20 s

140

220 °C (428 °F)

28 mm

148

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.