Other Programmable Logic Devices (PLD) 1,448

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Part RoHS Manufacturer Programmable IC Type Grading Of Temperature Form Of Terminal No. of Terminals Package Code Package Shape Package Body Material Propagation Delay No. of Logic Cells Surface Mount Maximum Supply Voltage No. of Macro Cells Technology Used Screening Level No. of Inputs Architecture Nominal Supply Voltage (V) Packing Method Power Supplies (V) Package Style (Meter) Package Equivalence Code Sub-Category In-System Programmable Output Function Minimum Supply Voltage No. of Product Terms Pitch Of Terminal Maximum Operating Temperature Organization No. of Dedicated Inputs Minimum Operating Temperature Finishing Of Terminal Used Position Of Terminal JESD-30 Code Moisture Sensitivity Level (MSL) Maximum Seated Height Width Qualification Additional Features JESD-609 Code Maximum Clock Frequency Maximum Time At Peak Reflow Temperature (s) No. of Outputs Peak Reflow Temperature (C) Length JTAG Boundary Scan Test No. of I/O Lines

5M570ZF256C4

Altera

Flash PLD

Other

Ball

256

LBGA

Square

Plastic/Epoxy

9.5 ns

Yes

1.89 V

440

CMOS

1.8

1.8,1.2/3.3 V

Grid Array, Low Profile

BGA256,16X16,40

Programmable Logic Devices

Yes

Macrocell

1.71 V

1 mm

85 °C (185 °F)

159 I/O

0 °C (32 °F)

Tin Lead

Bottom

S-PBGA-B256

1.55 mm

17 mm

No

e0

184.1 MHz

17 mm

Yes

159

EP2A15B724C8

Altera

Loadable PLD

Other

Ball

724

BGA

Square

Plastic/Epoxy

1.94 ns

16640

Yes

1.575 V

CMOS

480

1.5

1.5,1.5/3.3 V

Grid Array

BGA724,27X27,50

Field Programmable Gate Arrays

Macrocell

1.425 V

1.27 mm

85 °C (185 °F)

492 I/O

0 °C (32 °F)

Tin Lead

Bottom

S-PBGA-B724

3.5 mm

35 mm

No

e0

480

220 °C (428 °F)

35 mm

492

EP20K30ERC208

Altera

Loadable PLD

Other

Gull Wing

208

HFQFP

Square

Plastic/Epoxy

Yes

1.89 V

1.8

Flatpack, Heat Sink/Slug, Fine Pitch

Macrocell

1.71 V

.5 mm

85 °C (185 °F)

4 Dedicated Inputs, 128 I/O

4

0 °C (32 °F)

Matte Tin

Quad

S-PQFP-G208

4.1 mm

28 mm

No

e3

160 MHz

28 mm

128

EP20K600CB652C9N

Altera

Loadable PLD

Other

Ball

652

BGA

Square

Plastic/Epoxy

2 ns

Yes

1.89 V

1.8

Grid Array

Macrocell

1.71 V

1.27 mm

85 °C (185 °F)

4 Dedicated Inputs, 488 I/O

4

0 °C (32 °F)

Tin Silver Copper

Bottom

S-PBGA-B652

2 mm

45 mm

No

e1

45 mm

488

EP20K100EBC672-1

Altera

Loadable PLD

Other

Ball

672

BGA

Square

Plastic/Epoxy

Yes

1.8

Grid Array

Macrocell

85 °C (185 °F)

4 Dedicated Inputs, 246 I/O

4

0 °C (32 °F)

Tin Silver Copper

Bottom

S-PBGA-B672

No

e1

246

EP20K1500EFC33-2

Altera

Loadable PLD

Other

Ball

1020

BGA

Square

Plastic/Epoxy

2.13 ns

51840

Yes

1.89 V

CMOS

800

1.8

1.8,1.8/3.3 V

Grid Array

BGA1020,32X32,40

Field Programmable Gate Arrays

Macrocell

1.71 V

1 mm

85 °C (185 °F)

4 Dedicated Inputs, 808 I/O

4

0 °C (32 °F)

Tin Lead

Bottom

S-PBGA-B1020

5A

3.5 mm

33 mm

No

e0

20 s

800

220 °C (428 °F)

33 mm

808

EP2A15B724C8N

Altera

Loadable PLD

Other

Ball

724

BGA

Square

Plastic/Epoxy

1.94 ns

Yes

1.575 V

CMOS

1.5

Grid Array

Macrocell

1.425 V

1.27 mm

85 °C (185 °F)

492 I/O

0 °C (32 °F)

Tin/Silver/Copper

Bottom

S-PBGA-B724

3.5 mm

35 mm

No

e1

40 s

245 °C (473 °F)

35 mm

492

EP20K60EQC208-3X

Altera

Loadable PLD

Other

Gull Wing

208

FQFP

Square

Plastic/Epoxy

3.56 ns

Yes

1.89 V

CMOS

1.8

Flatpack, Fine Pitch

Macrocell

1.71 V

.5 mm

85 °C (185 °F)

4 Dedicated Inputs, 148 I/O

4

0 °C (32 °F)

Matte Tin

Quad

S-PQFP-G208

3

4.1 mm

28 mm

No

e3

160 MHz

220 °C (428 °F)

28 mm

148

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.