QCCJ Programmable Logic Devices (PLD) 2,131

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EPF8282AVLI84-5	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	3.6 V		CMOS				3.3		Chip Carrier				Registered	3 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry					220 °C (428 °F)	29.3116 mm		64
EP1800LC-35T	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	35 ns		Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No		e0				220 °C (428 °F)		No
EPM5128ALC-12	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	20 ns		Yes		128	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No		e0				220 °C (428 °F)		No
EPX740LC44-10	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	12 ns	40	Yes	5.25 V		CMOS		32		5	5 V	Chip Carrier	LDCC44,.7SQ	Field Programmable Gate Arrays		Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 30 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	4 Labs; 40 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	71.4 MHz		32	220 °C (428 °F)	16.5862 mm		30
EPM7128SLI84-7	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.5 V	128	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells	e0	166.7 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPF8636ALM84-3	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V						29.3116 mm		64
EPM7032JC44-3	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy			Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)		Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No							16.5862 mm		36
EPM7128ALI84-7	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	3.6 V	128	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells	e0	116.3 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPM5128JMB	Altera	UV PLD	Military	J Bend	68	QCCJ	Square	Ceramic	35 ns		Yes		128	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J68						e0				220 °C (428 °F)		No
EPF10K10LC84-3	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	0.5 ns	576	Yes	5.25 V		CMOS		59		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 59 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	576 Logic Elements	e0	71.43 MHz	20 s	59	220 °C (428 °F)	29.3116 mm		59
EPM5064LC44-2	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.25 V	64	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 28 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	64 Macrocells; Shared Input/Clock; Shared Product Terms	e0	40 MHz			220 °C (428 °F)	16.5862 mm	No	28
EPM7032LI44-3	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V	32	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 36 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No		e0				220 °C (428 °F)	16.5862 mm	No	36
EPM7064LC44-12	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.25 V	64	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44	1	4.572 mm	16.5862 mm	No	Labs interconnected by PIA; 4 Labs; 64 Macrocells; 1 External Clock; Shared Input/Clock	e0	125 MHz	20 s		220 °C (428 °F)	16.5862 mm	No	36
EPM5032LI-15	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V			85 °C (185 °F)	7 Dedicated Inputs, 16 I/O	7	-40 °C (-40 °F)		Quad	S-PQCC-J28				No			83.3 MHz						16
EPM5064ALC-15	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 28 I/O	7	0 °C (32 °F)		Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	Labs interconnected by PIA; 4 Labs; 64 Macrocells; 1 External Clock; Shared Input/Clock		83.3 MHz				16.5862 mm		28
EPM7064LC68-10	Altera	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V	64	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 52 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68	2	5.08 mm	24.2316 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz	20 s		220 °C (428 °F)	24.2316 mm	No	52
EPF8452LC84-2	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		336	Yes	5.25 V		CMOS		68		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 64 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	452 Flip Flops; 336 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0			64	220 °C (428 °F)	29.3116 mm		64
EPF10K10LC84-3N	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	0.5 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 59 I/O	4	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	576 Logic Elements	e3	71.43 MHz				29.3116 mm		59
5962-01-357-5595	Altera		Military	J Bend	44	QCCJ	Square	Ceramic	60 ns		Yes			CMOS	38535Q/M;38534H;883B	36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell		240	1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)		Quad	S-XQCC-J44				No			16.7 MHz		24
EP1810LC-25	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	28 ns		Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	40 MHz			220 °C (428 °F)		No	48
EPM5064JI-2	Altera	UV PLD	Industrial	J Bend	44	QCCJ	Square	Ceramic	30 ns		Yes		64	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No				1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Quad	S-XQCC-J44				No		e0				220 °C (428 °F)		No
MPM5064LC-2	Altera	Mask PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 28 I/O	7	0 °C (32 °F)		Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No	Labs interconnected by PIA; 4 Labs; 64 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz			220 °C (428 °F)	16.5862 mm		28
EPF8636ALI84-4	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy		504	Yes	5.5 V		CMOS		68		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0		20 s	64	220 °C (428 °F)	29.3116 mm		64
EPM9320LC84-20N	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	23 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e3	100 MHz				29.3116 mm		60
EP1810LC-20	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	22 ns		Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	50 MHz			220 °C (428 °F)		No	48
EPM5016LC-17	Altera	OT PLD	Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy	17 ns		Yes	5.25 V		CMOS		16	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 8 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20		4.572 mm	9.017 mm	No	Macrocells interconnected by PIA; 16 Macrocells; 1 External Clock; Shared Input/Clock	e0	83.3 MHz		8	220 °C (428 °F)	9.017 mm		8
EPM5130LI-2	Altera	OT PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.5 V	128	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	19 Dedicated Inputs, 48 I/O	19	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84				No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz			220 °C (428 °F)		No	48
EP1800ILC-75	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic	75 ns		Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No		e0				220 °C (428 °F)		No
EPM5032LC-25	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.25 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	320	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.57 mm	11.5062 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	62.5 MHz		16	220 °C (428 °F)	11.5062 mm		16
EPF8452LM84-3	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs With Fasttrack Interconnect; 452 Flip Flops; 336 Logic Elements						29.3116 mm		64
EPS448LM28-20	Altera	OT PLD	Military	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	125 °C (257 °F)	8 Dedicated Inputs, 0 I/O	8	-55 °C (-67 °F)		Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	PLS		20 MHz				11.5062 mm		0
EPM7032SLI44-15	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V	32	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 32 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e0	76.9 MHz			220 °C (428 °F)	16.5862 mm	No	32
EPM3032ALI44-10	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V	32	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 34 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44	1	4.572 mm	16.5862 mm	No		e0	103.1 MHz			220 °C (428 °F)	16.5862 mm	Yes	34
EPM7128AELC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V	128	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No		e0	98 MHz	20 s		220 °C (428 °F)	29.3116 mm	Yes	68
EP1830JC-25	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Ceramic	28 ns		Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-XQCC-J68				No		e0				220 °C (428 °F)		No
EPM7128ALC84-5	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	3.6 V	128	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells; 8 Labs; Configurable I/O operation with 2.5 V or 3.3 V	e0	250 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPM5192LC84	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.25 V	192	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms	e0	33.3 MHz			220 °C (428 °F)	29.3116 mm	No	64
MPM1810LC-25	Altera	Mask PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	28 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)		Quad	S-PQCC-J68		4.572 mm	24.2316 mm	No	48 Macrocells; 4 External Clocks; Shared Input/Clock		40 MHz				24.2316 mm		48
EPM7096LC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V	96	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM5192LM	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V	192	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPF8636ALC84-2	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		504	Yes	5.25 V		CMOS		68		5	5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	504 Logic Elements	e0	417 MHz		64	220 °C (428 °F)	29.3116 mm		68
EPM3064ALI44-7	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	3.6 V	64	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 34 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e0	135.1 MHz			220 °C (428 °F)	16.5862 mm	Yes	34
EPM7064SLC44-6	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.25 V	64	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44	1	4.572 mm	16.5862 mm	No		e0	200 MHz	20 s		220 °C (428 °F)	16.5862 mm	Yes	36
EP22V10LC-7	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	9 ns		Yes	5.25 V		CMOS		22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	132	1.27 mm	70 °C (158 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.57 mm	11.505 mm	No	Macrocells Interconnected By Global Bus; 10 Macrocells; 1 External Clock	e0	109.8 MHz		10	220 °C (428 °F)	11.505 mm		10
EP610LI28-20	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	22 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	16 Macrocells; 2 External Clocks		62.5 MHz				11.5062 mm		16
EP610LI-15	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V						5		Chip Carrier				Macrocell	4.5 V			85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J28				No			83.3 MHz						16
EP610ALC-12	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.25 V		CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	83.3 MHz		16	220 °C (428 °F)	11.5062 mm		16
EP1800LC-3	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy			Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68			24.2316 mm	No	48 Macrocells	e0	18.5 MHz			220 °C (428 °F)	24.2316 mm	No	48

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.