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Manufacturer | Altera |
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Manufacturer's Part Number | EPM5128GM883B-2 |
Description | UV PLD; Grading Of Temperature: MILITARY; Form Of Terminal: PIN/PEG; No. of Terminals: 68; Package Code: WPGA; Package Shape: SQUARE; |
Datasheet | EPM5128GM883B-2 Datasheet |
In Stock | 360 |
NAME | DESCRIPTION |
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Package Body Material: | Ceramic, Metal-Sealed Cofired |
Propagation Delay: | 45 ns |
Organization: | 7 Dedicated Inputs, 52 I/O |
Maximum Seated Height: | 4.96 mm |
Sub-Category: | Programmable Logic Devices |
Surface Mount: | No |
Position Of Terminal: | Perpendicular |
No. of Terminals: | 68 |
JTAG Boundary Scan Test: | No |
No. of I/O Lines: | 52 |
Package Style (Meter): | Grid Array, Window |
Screening Level: | 38535Q/M;38534H;883B |
JESD-30 Code: | S-CPGA-P68 |
Maximum Clock Frequency: | 40 MHz |
Package Shape: | Square |
Maximum Operating Temperature: | 125 °C (257 °F) |
Package Code: | WPGA |
Width: | 27.94 mm |
No. of Dedicated Inputs: | 7 |
Grading Of Temperature: | Military |
Programmable IC Type: | UV PLD |
Nominal Supply Voltage (V): | 5 |
Technology Used: | CMOS |
JESD-609 Code: | e0 |
Minimum Operating Temperature: | -55 °C (-67 °F) |
Qualification: | No |
Package Equivalence Code: | PGA68,11X11 |
Finishing Of Terminal Used: | Tin Lead |
Length: | 27.94 mm |
Form Of Terminal: | Pin/Peg |
In-System Programmable: | No |
Additional Features: | Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock |
Output Function: | Macrocell |
Pitch Of Terminal: | 2.54 mm |
Peak Reflow Temperature (C): | 220 °C (428 °F) |
No. of Macro Cells: | 128 |
Power Supplies (V): | 5 V |