Part | RoHS | Manufacturer | Programmable IC Type | Grading Of Temperature | Form Of Terminal | No. of Terminals | Package Code | Package Shape | Total Dose (V) | Package Body Material | No. of Logic Cells | Surface Mount | Maximum Supply Voltage | No. of CLBs | Technology Used | Screening Level | No. of Inputs | No. of Equivalent Gates | Nominal Supply Voltage (V) | Packing Method | Power Supplies (V) | Package Style (Meter) | Package Equivalence Code | Sub-Category | Minimum Supply Voltage | Pitch Of Terminal | Maximum Operating Temperature | Maximum Combinatorial Delay of a CLB | Organization | Minimum Operating Temperature | Finishing Of Terminal Used | Position Of Terminal | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Seated Height | Width | Qualification | Additional Features | JESD-609 Code | Maximum Clock Frequency | Maximum Time At Peak Reflow Temperature (s) | No. of Outputs | Peak Reflow Temperature (C) | Length |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
HPGA |
Square |
Ceramic, Metal-Sealed Cofired |
484 |
No |
5.25 V |
484 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
1.75 ns |
484 CLBS, 6500 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Max usable 7500 Logic gates |
323 MHz |
144 |
42.164 mm |
|||||||||
Xilinx |
FPGA |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
320 |
CMOS |
5000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
9 ns |
320 CLBS, 5000 Gates |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000 |
70 MHz |
42.164 mm |
|||||||||||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
HPGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
5.25 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
2.7 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Max usable 6000 Logic gates |
e0 |
270 MHz |
144 |
42.164 mm |
||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
320 |
No |
5.25 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA176,16X16MOD |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
9 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-PPGA-P175 |
1 |
3.937 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000; power-down supplier current = 250 µA |
e0 |
70 MHz |
144 |
42.164 mm |
|||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
320 |
CMOS |
MIL-STD-883 |
5000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
7 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
100 MHz |
42.164 mm |
||||||||||||||||||
Xilinx |
FPGA |
Pin/Peg |
175 |
HPGA |
Square |
Plastic/Epoxy |
484 |
No |
5.5 V |
484 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
3.3 ns |
484 CLBS, 6500 Gates |
Perpendicular |
S-PPGA-P175 |
4.191 mm |
42.164 mm |
No |
Max usable 7500 Logic gates |
227 MHz |
144 |
42.164 mm |
|||||||||||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
No |
5.5 V |
320 |
CMOS |
9000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
85 °C (185 °F) |
9 ns |
320 CLBS, 9000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-PPGA-P175 |
3.937 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; power-down supplier current = 5 µA @ VCC = 3.2 V & T = 25°C |
70 MHz |
42.164 mm |
||||||||||||||||
Xilinx |
FPGA |
Pin/Peg |
175 |
HPGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
5.5 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
2.7 ns |
320 CLBS, 5000 Gates |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Max usable 6000 Logic gates |
270 MHz |
144 |
42.164 mm |
|||||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
320 |
No |
5.25 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA176,16X16MOD |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
5.5 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-PPGA-P175 |
1 |
3.937 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000; power-down supplier current = 250 µA |
e0 |
125 MHz |
144 |
42.164 mm |
|||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
HPGA |
Square |
Plastic/Epoxy |
320 |
No |
5.25 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
4.1 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-PPGA-P175 |
1 |
4.191 mm |
42.164 mm |
No |
Max usable 6000 Logic gates |
e0 |
135 MHz |
144 |
42.164 mm |
|||||||
Xilinx |
FPGA |
Pin/Peg |
175 |
HPGA |
Square |
Plastic/Epoxy |
484 |
No |
5.5 V |
484 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
2.2 ns |
484 CLBS, 6500 Gates |
Perpendicular |
S-PPGA-P175 |
1 |
4.191 mm |
42.164 mm |
No |
Max usable 7500 Logic gates |
323 MHz |
144 |
42.164 mm |
||||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
HPGA |
Square |
Plastic/Epoxy |
No |
5.25 V |
320 |
CMOS |
5000 |
5 |
Grid Array, Heat Sink/Slug |
4.75 V |
2.54 mm |
85 °C (185 °F) |
2.2 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Matte Tin |
Perpendicular |
S-PPGA-P175 |
4.191 mm |
42.164 mm |
No |
Max usable 6000 Logic gates |
e3 |
323 MHz |
42.164 mm |
||||||||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
320 |
No |
5.25 V |
320 |
CMOS |
144 |
9000 |
5 |
5 V |
Grid Array |
PGA176,16X16MOD |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
320 CLBS, 9000 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-PPGA-P175 |
1 |
3.937 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops |
e0 |
50 MHz |
144 |
42.164 mm |
||||||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
320 |
No |
5.5 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
4.1 ns |
320 CLBS, 5000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-PPGA-P175 |
1 |
3.937 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; typical gates = 5000 - 7500 |
190 MHz |
144 |
42.164 mm |
|||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
HPGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.25 V |
320 |
CMOS |
5000 |
5 |
Grid Array, Heat Sink/Slug |
4.75 V |
2.54 mm |
85 °C (185 °F) |
1.75 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P175 |
42.164 mm |
Max usable 6000 Logic gates |
323 MHz |
42.164 mm |
||||||||||||||||||
|
Xilinx |
FPGA |
Commercial |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
484 |
No |
5.25 V |
484 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
3.3 ns |
484 CLBS, 6500 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
MAX 176 I/OS; 1320 flip-flops; typical gates = 6500 - 9000 |
230 MHz |
144 |
42.164 mm |
|||||||||
|
Xilinx |
FPGA |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
5.5 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
4.1 ns |
320 CLBS, 5000 Gates |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Typical gates = 5000-6000 |
188 MHz |
144 |
42.164 mm |
||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
320 |
CMOS |
38535Q/M;38534H;883B |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Typical gates = 5000-6000 |
188 MHz |
144 |
42.164 mm |
||||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
HPGA |
Square |
Ceramic, Metal-Sealed Cofired |
484 |
No |
5.25 V |
484 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
2.2 ns |
484 CLBS, 6500 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Max usable 7500 Logic gates |
323 MHz |
144 |
42.164 mm |
|||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
320 |
CMOS |
9000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
9 ns |
320 CLBS, 9000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
3.5052 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; power-down supplier current = 5 µA @ VCC = 3.2 V & T = 25°C |
70 MHz |
42.164 mm |
||||||||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
HPGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.25 V |
320 |
CMOS |
5000 |
5 |
Grid Array, Heat Sink/Slug |
4.75 V |
2.54 mm |
85 °C (185 °F) |
3.3 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P175 |
42.164 mm |
Max usable 6000 Logic gates |
227 MHz |
42.164 mm |
||||||||||||||||||
Xilinx |
FPGA |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
320 |
CMOS |
5000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
7 ns |
320 CLBS, 5000 Gates |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000 |
100 MHz |
42.164 mm |
|||||||||||||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
No |
5.25 V |
320 |
CMOS |
9000 |
5 |
Grid Array |
4.75 V |
2.54 mm |
70 °C (158 °F) |
7 ns |
320 CLBS, 9000 Gates |
0 °C (32 °F) |
Perpendicular |
S-PPGA-P175 |
3.937 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; power-down supplier current = 5 µA @ VCC = 3.2 V & T = 25°C |
100 MHz |
42.164 mm |
||||||||||||||||
Xilinx |
FPGA |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
484 |
No |
5.5 V |
484 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
4.1 ns |
484 CLBS, 6500 Gates |
Perpendicular |
S-PPGA-P175 |
1 |
4.191 mm |
42.164 mm |
No |
Typical gates = 6500-7500 |
188 MHz |
144 |
42.164 mm |
||||||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.25 V |
320 |
CMOS |
9000 |
5 |
Grid Array |
4.75 V |
2.54 mm |
70 °C (158 °F) |
320 CLBS, 9000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P175 |
3.5052 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; power-down supplier current = 5 µA @ VCC = 3.2 V & T = 25°C |
50 MHz |
42.164 mm |
|||||||||||||||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
320 |
CMOS |
9000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
85 °C (185 °F) |
9 ns |
320 CLBS, 9000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P175 |
3.5052 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; power-down supplier current = 5 µA @ VCC = 3.2 V & T = 25°C |
70 MHz |
42.164 mm |
||||||||||||||||
Xilinx |
FPGA |
Pin/Peg |
175 |
HPGA |
Square |
Plastic/Epoxy |
320 |
No |
5.5 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
5.1 ns |
320 CLBS, 5000 Gates |
Tin Lead |
Perpendicular |
S-PPGA-P175 |
4.191 mm |
42.164 mm |
No |
Max usable 6000 Logic gates |
e0 |
113 MHz |
144 |
42.164 mm |
|||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
HPGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
5.25 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
2.2 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Max usable 6000 Logic gates |
323 MHz |
144 |
42.164 mm |
||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; typical gates = 5000 - 7500 |
190 MHz |
144 |
42.164 mm |
|||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA176,16X16MOD |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000; power-down supplier current = 250 µA |
50 MHz |
144 |
42.164 mm |
||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
484 |
CMOS |
MIL-STD-883 Class B |
6500 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
3.3 ns |
484 CLBS, 6500 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
42.164 mm |
|||||||||||||||||||
|
Xilinx |
FPGA |
Commercial |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
5.25 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
2.7 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; typical gates = 5000 - 7500 |
270 MHz |
144 |
42.164 mm |
|||||||||
|
Xilinx |
FPGA |
Industrial |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
5.5 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
3.3 ns |
320 CLBS, 5000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; typical gates = 5000 - 7500 |
230 MHz |
144 |
42.164 mm |
|||||||||
|
Xilinx |
FPGA |
Industrial |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
484 |
No |
5.5 V |
484 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
4.1 ns |
484 CLBS, 6500 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
MAX 176 I/OS; 1320 flip-flops; typical gates = 6500 - 9000 |
190 MHz |
144 |
42.164 mm |
|||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
320 |
CMOS |
5000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
7 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000 |
100 MHz |
42.164 mm |
||||||||||||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
484 |
No |
5.25 V |
484 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
4.1 ns |
484 CLBS, 6500 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Typical gates = 6500-7500 |
188 MHz |
144 |
42.164 mm |
|||||||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
No |
5.5 V |
320 |
CMOS |
9000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
85 °C (185 °F) |
320 CLBS, 9000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-PPGA-P175 |
3.937 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; power-down supplier current = 5 µA @ VCC = 3.2 V & T = 25°C |
50 MHz |
42.164 mm |
|||||||||||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
320 |
No |
5.25 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
4.1 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Perpendicular |
S-PPGA-P175 |
1 |
3.937 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; typical gates = 5000 - 7500 |
190 MHz |
144 |
42.164 mm |
|||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
484 |
No |
484 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
484 CLBS, 6500 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Typical gates = 6500-7500 |
188 MHz |
144 |
42.164 mm |
|||||||||||
Xilinx |
FPGA |
Pin/Peg |
175 |
HPGA |
Square |
Plastic/Epoxy |
320 |
No |
5.5 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
2.2 ns |
320 CLBS, 5000 Gates |
Perpendicular |
S-PPGA-P175 |
4.191 mm |
42.164 mm |
No |
Max usable 6000 Logic gates |
323 MHz |
144 |
42.164 mm |
|||||||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
484 |
No |
5.25 V |
484 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
3.3 ns |
484 CLBS, 6500 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-PPGA-P175 |
1 |
3.937 mm |
42.164 mm |
No |
MAX 176 I/OS; 1320 flip-flops; typical gates = 6500 - 9000 |
e0 |
230 MHz |
144 |
42.164 mm |
|||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
No |
5.25 V |
320 |
CMOS |
5000 |
5 |
Grid Array |
4.75 V |
2.54 mm |
85 °C (185 °F) |
9 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Perpendicular |
S-PPGA-P175 |
3.937 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000 |
70 MHz |
42.164 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
484 |
CMOS |
MIL-STD-883 |
6500 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
484 CLBS, 6500 Gates |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Typical gates = 6500-7500 |
e4 |
188 MHz |
42.164 mm |
|||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA176,16X16MOD |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
9 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000; power-down supplier current = 250 µA |
e3 |
70 MHz |
144 |
42.164 mm |
|||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
320 |
CMOS |
9000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
320 CLBS, 9000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
3.5052 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; power-down supplier current = 5 µA @ VCC = 3.2 V & T = 25°C |
50 MHz |
42.164 mm |
|||||||||||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
HPGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
5.25 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
4.1 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Max usable 6000 Logic gates |
135 MHz |
144 |
42.164 mm |
|||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
5.25 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA176,16X16MOD |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
9 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000; power-down supplier current = 250 µA |
70 MHz |
144 |
42.164 mm |
|||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
HPGA |
Square |
Plastic/Epoxy |
320 |
No |
5.25 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
1.5 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Perpendicular |
S-PPGA-P175 |
4.191 mm |
42.164 mm |
No |
Max usable 6000 Logic gates |
370 MHz |
144 |
42.164 mm |
Field Programmable Gate Arrays (FPGAs) are digital integrated circuits that are programmable by the user to perform specific logic functions. They consist of a matrix of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes FPGAs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.
FPGAs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the FPGA hardware. The resulting configuration data is then loaded onto the FPGA, allowing it to perform the desired logic functions.
FPGAs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.