Part | RoHS | Manufacturer | Programmable IC Type | Grading Of Temperature | Form Of Terminal | No. of Terminals | Package Code | Package Shape | Total Dose (V) | Package Body Material | No. of Logic Cells | Surface Mount | Maximum Supply Voltage | No. of CLBs | Technology Used | Screening Level | No. of Inputs | No. of Equivalent Gates | Nominal Supply Voltage (V) | Packing Method | Power Supplies (V) | Package Style (Meter) | Package Equivalence Code | Sub-Category | Minimum Supply Voltage | Pitch Of Terminal | Maximum Operating Temperature | Maximum Combinatorial Delay of a CLB | Organization | Minimum Operating Temperature | Finishing Of Terminal Used | Position Of Terminal | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Seated Height | Width | Qualification | Additional Features | JESD-609 Code | Maximum Clock Frequency | Maximum Time At Peak Reflow Temperature (s) | No. of Outputs | Peak Reflow Temperature (C) | Length |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Xilinx |
FPGA |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
CMOS |
5 |
Grid Array |
2.54 mm |
Perpendicular |
S-CPGA-P156 |
4.318 mm |
42.164 mm |
No |
42.164 mm |
|||||||||||||||||||||||||||
Xilinx |
FPGA |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
484 |
No |
5.5 V |
484 |
CMOS |
176 |
6500 |
5 |
5 V |
Grid Array |
PGA223,18X18 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
2.2 ns |
484 CLBS, 6500 Gates |
Perpendicular |
S-CPGA-P223 |
1 |
4.318 mm |
47.244 mm |
No |
Typical gates = 6500-7500 |
323 MHz |
176 |
47.244 mm |
||||||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
320 |
No |
5.25 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
4.1 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Perpendicular |
S-PPGA-P175 |
1 |
3.937 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; typical gates = 5000 - 7500 |
190 MHz |
144 |
42.164 mm |
|||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000; power-down supplier current = 120 µA |
50 MHz |
96 |
37.084 mm |
||||||||||||
|
Xilinx |
FPGA |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
224 |
No |
5.5 V |
224 |
CMOS |
110 |
3500 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
2.2 ns |
224 CLBS, 3500 Gates |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
Typical gates = 3500-4500 |
323 MHz |
110 |
37.084 mm |
||||||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
224 |
No |
5.25 V |
224 |
CMOS |
110 |
6400 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
224 CLBS, 6400 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-PPGA-P132 |
1 |
4.191 mm |
37.084 mm |
No |
MAX 110 I/OS; 688 flip-flops |
e0 |
50 MHz |
110 |
37.084 mm |
||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
484 |
No |
484 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
484 CLBS, 6500 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Typical gates = 6500-7500 |
188 MHz |
144 |
42.164 mm |
|||||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.25 V |
100 |
CMOS |
3000 |
5 |
Grid Array |
4.75 V |
2.54 mm |
70 °C (158 °F) |
100 CLBS, 3000 Gates |
0 °C (32 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
MAX 74 I/OS; 360 flip-flops; power-down supplier current = 2 µA @ VCC = 3.2 V & T = 25°C |
e3 |
50 MHz |
27.94 mm |
|||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
CMOS |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
e4 |
27.94 mm |
||||||||||||||||||||||
|
Xilinx |
FPGA |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
5.5 V |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
3.3 ns |
144 CLBS, 2000 Gates |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
Typical gates = 2000-3000 |
227 MHz |
96 |
37.084 mm |
||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
CMOS |
MIL-STD-883 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
e4 |
27.94 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
1024 |
No |
5.5 V |
1024 |
CMOS |
256 |
20000 |
5 |
5 V |
Grid Array |
PGA223,18X18 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
4.5 ns |
1024 CLBS, 20000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P223 |
1 |
4.064 mm |
47.244 mm |
No |
2560 flip-flops; typical gates = 20000-25000 |
133.3 MHz |
256 |
47.244 mm |
|||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.25 V |
64 |
CMOS |
2000 |
5 |
Grid Array |
4.75 V |
2.54 mm |
70 °C (158 °F) |
64 CLBS, 2000 Gates |
0 °C (32 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
MAX 64 I/OS; 256 flip-flops; power-down supplier current = 1 µA @ VCC = 3.2 V & T = 25°C |
e3 |
50 MHz |
27.94 mm |
|||||||||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
484 |
No |
5.25 V |
484 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
3.3 ns |
484 CLBS, 6500 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-PPGA-P175 |
1 |
3.937 mm |
42.164 mm |
No |
MAX 176 I/OS; 1320 flip-flops; typical gates = 6500 - 9000 |
e0 |
230 MHz |
144 |
42.164 mm |
|||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
No |
5.25 V |
320 |
CMOS |
5000 |
5 |
Grid Array |
4.75 V |
2.54 mm |
85 °C (185 °F) |
9 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Perpendicular |
S-PPGA-P175 |
3.937 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000 |
70 MHz |
42.164 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
100 |
CMOS |
1800 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
15 ns |
100 CLBS, 1800 Gates |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
e4 |
33 MHz |
27.94 mm |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Rectangular |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
64 |
CMOS |
MIL-STD-883 |
2000 |
5 |
Grid Array |
4.5 V |
125 °C (257 °F) |
9 ns |
64 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Gold |
Perpendicular |
R-CPGA-P84 |
No |
e4 |
25 MHz |
||||||||||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
144 |
No |
5.25 V |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
5.5 ns |
144 CLBS, 2000 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-PPGA-P132 |
1 |
3.7338 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000; power-down supplier current = 120 µA |
e0 |
125 MHz |
96 |
37.084 mm |
|||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
484 |
CMOS |
MIL-STD-883 |
6500 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
484 CLBS, 6500 Gates |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Typical gates = 6500-7500 |
e4 |
188 MHz |
42.164 mm |
|||||||||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
196 |
No |
5.25 V |
196 |
CMOS |
112 |
4000 |
5 |
5 V |
Grid Array |
PGA156,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
4 ns |
196 CLBS, 4000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P156 |
3.683 mm |
42.164 mm |
No |
616 flip-flops; typical gates = 4000-5000 |
133.3 MHz |
112 |
42.164 mm |
|||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA176,16X16MOD |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
9 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000; power-down supplier current = 250 µA |
e3 |
70 MHz |
144 |
42.164 mm |
|||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
120 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
5.25 V |
144 |
CMOS |
95 |
3200 |
5 |
5 V |
Grid Array |
PGA120,13X13 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
4.5 ns |
144 CLBS, 3200 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P120 |
3.81 mm |
34.544 mm |
No |
480 flip-flops; typical gates = 3200-4000 |
133.3 MHz |
95 |
34.544 mm |
|||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
352 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
3.6 V |
1024 |
CMOS |
18000 |
3.3 |
Grid Array |
3 V |
85 °C (185 °F) |
1024 CLBS, 18000 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-CPGA-P352 |
No |
e0 |
200 MHz |
||||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
299 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
784 |
CMOS |
13000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
784 CLBS, 13000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Perpendicular |
S-CPGA-P299 |
4.318 mm |
52.324 mm |
No |
e0 |
125 MHz |
52.324 mm |
||||||||||||||||
Xilinx |
FPGA |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
64 |
CMOS |
1000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
2.2 ns |
64 CLBS, 1000 Gates |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
Typical gates = 1000-1500 |
323 MHz |
27.94 mm |
|||||||||||||||||||
|
Xilinx |
FPGA |
Commercial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic |
100 |
No |
CMOS |
74 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
2.54 mm |
70 °C (158 °F) |
0 °C (32 °F) |
Perpendicular |
S-XPGA-P84 |
No |
33 MHz |
74 |
|||||||||||||||||||
|
Xilinx |
FPGA |
Industrial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
No |
5.5 V |
64 |
CMOS |
64 |
1000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
3.3 ns |
64 CLBS, 1000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
Typical gates = 1000-1500 |
227 MHz |
64 |
27.94 mm |
|||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
144 |
CMOS |
MIL-STD-883 Class B |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
7 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000; power-down supplier current = 120 µA |
100 MHz |
96 |
37.084 mm |
||||||||||
|
Xilinx |
FPGA |
Commercial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
5.25 V |
144 |
CMOS |
74 |
3000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
2.7 ns |
144 CLBS, 3000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
MAX 96 I/OS; 480 flip-flops; typical gates = 3000 - 3700 |
270 MHz |
74 |
27.94 mm |
|||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
CMOS |
MIL-STD-883 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P223 |
4.318 mm |
47.244 mm |
No |
e4 |
47.244 mm |
|||||||||||||||||||||
|
Xilinx |
FPGA |
Industrial |
Pin/Peg |
68 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
No |
5.5 V |
64 |
CMOS |
58 |
600 |
5 |
5 V |
Grid Array |
PGA68,11X11 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
8 ns |
64 CLBS, 600 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P68 |
4.064 mm |
27.94 mm |
No |
122 flip-flops; typical gates = 600-1000 |
100 MHz |
58 |
27.94 mm |
|||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
320 |
CMOS |
9000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
320 CLBS, 9000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
3.5052 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; power-down supplier current = 5 µA @ VCC = 3.2 V & T = 25°C |
50 MHz |
42.164 mm |
|||||||||||||||||
|
Xilinx |
FPGA |
Commercial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
No |
5.25 V |
64 |
CMOS |
64 |
1000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
4.1 ns |
64 CLBS, 1000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
Typical gates = 1000-1500 |
188 MHz |
64 |
27.94 mm |
|||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
100 |
No |
5.25 V |
100 |
CMOS |
74 |
1000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
5.5 ns |
100 CLBS, 1000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
174 flip-flops; typical gates = 1000-1500 |
130 MHz |
74 |
27.94 mm |
|||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.25 V |
100 |
CMOS |
1500 |
5 |
Grid Array |
4.75 V |
2.54 mm |
85 °C (185 °F) |
9 ns |
100 CLBS, 1500 Gates |
0 °C (32 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
360 flip-flops; typical gates = 1500-2000 |
e3 |
70 MHz |
27.94 mm |
||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
No |
64 |
CMOS |
MIL-STD-883 Class B |
64 |
1000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
9 ns |
64 CLBS, 1000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
256 flip-flops; typical gates = 1000-1500; power-down supplier current = 50 µA |
70 MHz |
64 |
27.94 mm |
||||||||||
|
Xilinx |
FPGA |
Pin/Peg |
299 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
4096 |
No |
5.25 V |
4096 |
CMOS |
256 |
16000 |
5 |
5 V |
Grid Array |
PGA299,20X20 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
4096 CLBS, 16000 Gates |
Matte Tin |
Perpendicular |
S-CPGA-P299 |
4.318 mm |
52.324 mm |
No |
Typical gates = 16000-24000 |
e3 |
111 MHz |
256 |
52.324 mm |
|||||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
484 |
No |
5.25 V |
484 |
CMOS |
176 |
6500 |
5 |
5 V |
Grid Array |
PGA223,18X18 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
4.1 ns |
484 CLBS, 6500 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P223 |
1 |
4.064 mm |
47.244 mm |
No |
MAX 176 I/OS; 1320 flip-flops; typical gates = 6500 - 9000 |
190 MHz |
176 |
47.244 mm |
|||||||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
144 |
No |
5.5 V |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
5.1 ns |
144 CLBS, 2000 Gates |
-40 °C (-40 °F) |
Tin Lead |
Perpendicular |
S-PPGA-P132 |
1 |
4.191 mm |
37.084 mm |
No |
Typical gates = 2000-3000 |
e0 |
113 MHz |
96 |
37.084 mm |
|||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
299 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
1862 |
No |
5.25 V |
784 |
CMOS |
256 |
16000 |
5 |
5 V |
Grid Array |
PGA299,20X20 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
4.5 ns |
784 CLBS, 16000 Gates |
0 °C (32 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P299 |
4.2418 mm |
52.324 mm |
No |
2016 flip-flops; typical gates = 16000-20000 |
e3 |
133.3 MHz |
256 |
52.324 mm |
|||||||
Xilinx |
FPGA |
Pin/Peg |
225 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
400 |
7000 |
5 |
Grid Array |
4.5 V |
2.7 ns |
400 CLBS, 7000 Gates |
Matte Tin |
Perpendicular |
S-CPGA-P225 |
No |
Can also use 20000 gates |
e3 |
111 MHz |
||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
196 |
CMOS |
MIL-STD-883 Class B |
4000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
196 CLBS, 4000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P156 |
4.318 mm |
42.164 mm |
No |
616 flip-flops; typical gates = 4000-5000 |
42.164 mm |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
CMOS |
MIL-STD-883 |
1800 |
5 |
Grid Array |
4.5 V |
125 °C (257 °F) |
1800 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
No |
|||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
MIL-STD-883 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
e4 |
27.94 mm |
|||||||||||||||||||||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
144 |
CMOS |
4200 |
5 |
Grid Array |
4.5 V |
2.54 mm |
85 °C (185 °F) |
144 CLBS, 4200 Gates |
-40 °C (-40 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
MAX 74 I/OS; 480 flip-flops; power-down supplier current = 3 µA @ VCC = 3.2 V & T = 25°C |
e3 |
50 MHz |
27.94 mm |
|||||||||||||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
784 |
No |
5.5 V |
784 |
CMOS |
224 |
16000 |
5 |
5 V |
Grid Array |
PGA223,18X18 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
4.5 ns |
784 CLBS, 16000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P223 |
1 |
4.064 mm |
47.244 mm |
No |
2016 flip-flops; typical gates = 16000-20000 |
133.3 MHz |
224 |
47.244 mm |
|||||||||
Xilinx |
FPGA |
Pin/Peg |
191 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
CMOS |
5 |
Grid Array |
2.54 mm |
Perpendicular |
S-CPGA-P191 |
4.064 mm |
47.244 mm |
No |
47.244 mm |
|||||||||||||||||||||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
5.25 V |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA176,16X16MOD |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
9 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000; power-down supplier current = 250 µA |
70 MHz |
144 |
42.164 mm |
Field Programmable Gate Arrays (FPGAs) are digital integrated circuits that are programmable by the user to perform specific logic functions. They consist of a matrix of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes FPGAs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.
FPGAs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the FPGA hardware. The resulting configuration data is then loaded onto the FPGA, allowing it to perform the desired logic functions.
FPGAs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.