J Bend Programmable Logic Devices (PLD) 2,387

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
CPL16L8-25NLC	Samsung		Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy	25 ns		Yes			CMOS		16	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Combinatorial		64	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20	3			No		e0			8
CPL16R4-25NLC	Samsung		Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy			Yes			CMOS		16	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Registered		64	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20	3			No		e0	28.5 MHz		4
CPL20R4-35NLC	Samsung		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes			CMOS		16	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Registered		60	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28	3			No		e0	18 MHz		8
CPL20V8-25NLC	Samsung		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes			CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		64	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28	3			No		e0	28.5 MHz		8
CPL16L8-15NLC	Samsung		Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy	15 ns		Yes			CMOS		16	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Combinatorial		64	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20	3			No		e0			8
CPL22V10-25NLC	Samsung		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes			CMOS		22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		132	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28	3			No		e0	33.3 MHz		10
CPL16V8L-25NLC	Samsung	EE PLD	Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy	25 ns		Yes			CMOS		18	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Macrocell		64	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20	3			No		e0	28.5 MHz		8
CPL16L8L-25NLC	Samsung		Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy	25 ns		Yes			CMOS		16	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Combinatorial		64	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20	3			No		e0			8
CPL16V8-35PLC	Samsung	EE PLD	Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy			Yes			CMOS		18	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Macrocell		64	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20	3			No		e0			8
CPL16R4L-20NLC	Samsung		Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy			Yes			CMOS		16	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Registered		64	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20	3			No		e0	33.3 MHz		4
CPL20R8L-15NLC	Samsung		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes			CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Registered		72	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28	3			No		e0	41.6 MHz		8
CPL20L10L-30NLC	Samsung		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	30 ns		Yes			CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Combinatorial		40	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28	3			No		e0			10
CPL20V8L-30NLC	Samsung		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes			CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		64	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28	3			No		e0	22.2 MHz		8
CPL20V8-20NLC	Samsung		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes			CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		64	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28	3			No		e0	33.3 MHz		8
CPL20L8-25NLC	Samsung		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	25 ns		Yes			CMOS		12	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Combinatorial		72	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28	3			No		e0			8
CPL20L10-20NLC	Samsung		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	20 ns		Yes			CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Combinatorial		40	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28	3			No		e0			10
CPL20L8L-35NLC	Samsung		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	35 ns		Yes			CMOS		12	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Combinatorial		72	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28	3			No		e0			8
CPL16R4-35NLC	Samsung		Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy			Yes			CMOS		16	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Registered		64	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20	3			No		e0	18 MHz		4
CPL22V10L-35NLC	Samsung		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes			CMOS		22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		132	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28	3			No		e0	18 MHz		10
EPX780LC84-15Z	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	18 ns	80	Yes	5.25 V		CMOS		62		5	5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	8 Labs; 80 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	50 MHz		62	220 °C (428 °F)	29.3116 mm		60
EP1810LI-40	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic	45 ns		Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68				No		e0				220 °C (428 °F)		No
EPM7128SLC84-15	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V	128	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz	20 s		220 °C (428 °F)	29.3116 mm	Yes	68
EPM7032AELC44-10	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V	32	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44	1	4.57 mm	16.5862 mm	No	32 Macrocells; 2 Labs; Configurable I/O operation with 2.5 V or 3.3 V	e0	103.1 MHz	20 s		220 °C (428 °F)	16.5862 mm	Yes	36
EPM9320LI84-20N	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	23 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 60 I/O	0	-40 °C (-40 °F)	Matte Tin/Copper	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e2	100 MHz	40 s		245 °C (473 °F)	29.3116 mm		60
EPM7064SLI68-15	Altera	EE PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V	64	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 48 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	76.9 MHz			220 °C (428 °F)	24.23 mm	No	48
EPX740LC44-15Z	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	18 ns	40	Yes	5.25 V		CMOS		32		5	5 V	Chip Carrier	LDCC44,.7SQ	Field Programmable Gate Arrays		Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 30 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	4 Labs; 40 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	50 MHz		32	220 °C (428 °F)	16.5862 mm		30
5962-01-330-5522	Altera		Military	J Bend	44	QCCJ	Square	Ceramic	60 ns		Yes			CMOS		36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell		240	1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J44	1			No		e0	16.7 MHz		24
EPF8452LI84-2	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs With Fasttrack Interconnect; 452 Flip Flops; 336 Logic Elements						29.3116 mm		64
EP610LM-35	Altera	OT PLD	Military	J Bend	28	QCCJ	Square	Plastic/Epoxy	37 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks		28.6 MHz				11.5062 mm		16
EPM7128SLC84-10F	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No			125 MHz				29.3116 mm		68
EPM7064AELC44-10N	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V		CMOS				3.3		Chip Carrier				Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	64 MICROCELLS; 4 Labs; Configurable I/O operation with 2.5 V or 3.3 V	e3	100 MHz				16.5862 mm		36
EP610AJC-15	Altera		Commercial	J Bend	28	QCCJ	Square	Ceramic	15 ns		Yes			CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		160	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-XQCC-J28				No		e0	71.4 MHz		16	220 °C (428 °F)
EP910LI44-30	Altera	OT PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	33 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	24 Macrocells; 2 External Clocks		41.7 MHz				16.5862 mm		24
EP1810LI68-35	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	40 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No	48 Macrocells; Shared Input/Clock		40 MHz				24.2316 mm		48
EPF10K10LI84-3	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	16.1 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Registered	4.75 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 59 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No							29.3116 mm		59
EPM7064SLC44-5F	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	5.25 V	64	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	64 Macrocells; 4 Labs; Configurable I/O operation with 3.3 V or 5 V	e0	250 MHz			220 °C (428 °F)	16.5862 mm	Yes	36
EP1800JI-3	Altera	UV PLD	Industrial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	80 ns		Yes	5.5 V	48	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells	e0	18.5 MHz			220 °C (428 °F)	24.13 mm	No	48
EPM7096JC84-3	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.25 V	96	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No		e0				220 °C (428 °F)	29.3116 mm	No	64
EPM7096LC68-15H	Altera	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 52 I/O	0	0 °C (32 °F)		Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No			100 MHz				24.2316 mm		52
EP610LC-20T	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	22 ns		Yes	5.25 V		CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.57 mm	11.5062 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	55.6 MHz		16	220 °C (428 °F)	11.5062 mm		16
EP1810LC68-25	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	28 ns		Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No	48 Macrocells; Shared Input/Clock	e0	50 MHz			220 °C (428 °F)	24.2316 mm	No	48
EPM5128ALM68-20	Altera	OT PLD	Military	J Bend	68	QCCJ	Square	Plastic/Epoxy	33 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		66.7 MHz				24.2316 mm		52
EPF10K10LI84-4	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	0.6 ns	576	Yes	5.25 V		CMOS		59		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 59 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	576 Logic Elements	e0	67.11 MHz		59	220 °C (428 °F)	29.3116 mm		59
EP600JM	Altera	UV PLD	Military	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns		Yes	5.5 V		CMOS		20	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	160	1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	16 Macrocells	e0	22.2 MHz		16	220 °C (428 °F)	11.43 mm		16
EP1210LI-2	Altera	OT PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	65 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Quad	S-PQCC-J44			16.6116 mm	No	28 Macrocells		23.2 MHz				16.6116 mm		24
5962-9061102YX	Altera	UV PLD	Military	J Bend	28	QCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns		Yes	5.5 V		CMOS	MIL-STD-883			5		Chip Carrier				Macrocell	4.5 V			125 °C (257 °F)	7 Dedicated Inputs, 16 I/O	7	-55 °C (-67 °F)		Quad	S-CQCC-J28				No			33.3 MHz						16
EPM5032LI28-15	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 16 I/O	7	-40 °C (-40 °F)		Quad	S-PQCC-J28		4.57 mm	11.5062 mm	No	32 Macrocells		83.3 MHz				11.5062 mm		16
EPM5128JM68	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns		Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz				24.13 mm		52

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.