J Bend Programmable Logic Devices (PLD) 2,387

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EP910LC44-30	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	33 ns		Yes	5.25 V		CMOS		36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.75 V	240	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	24 Macrocells; 2 External Clocks	e0	41.7 MHz		24	220 °C (428 °F)	16.5862 mm		24
EPM9400LI84-12	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 59 I/O	0	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	400 Macrocells; 580 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		118 MHz				29.3116 mm		59
MP1810LC-35	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	40 ns		Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No		e0				220 °C (428 °F)		No
EP610ALC-15	Altera		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	15 ns		Yes			CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		160	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28				No		e0	71.4 MHz		16	220 °C (428 °F)
EPM5128ALC68-12	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)		Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		111.1 MHz				24.2316 mm		52
MP1810LC-25	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	28 ns		Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No		e0				220 °C (428 °F)		No
EPM9400LC84-15	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	16.2 ns		Yes	5.25 V	400	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 59 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	580 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	117.6 MHz			220 °C (428 °F)	29.3116 mm	Yes	59
EPM7032VLI44-20	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	3.6 V	32	CMOS				3.3	3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 32 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	Labs interconnected by PIA; 2 Labs; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	62.5 MHz			220 °C (428 °F)	16.5862 mm	No	32
EPM7128SLI84-6N	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	6 ns		Yes		128	CMOS					3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes				1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)		Quad	S-PQCC-J84				No								Yes
EP600JC-2	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	35 ns		Yes	5.25 V		CMOS		20	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	16 Macrocells	e0	33.3 MHz		16	220 °C (428 °F)	11.43 mm		16
EP1830JM-30	Altera	OT PLD	Military	J Bend	68	QCCJ	Square	Ceramic	34 ns		Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J68				No		e0				220 °C (428 °F)		No
EPF8282VLM84-3	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes			CMOS				3.3		Chip Carrier				Registered			1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry						29.3116 mm		64
EPM7064SLC44-6N	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.25 V	64	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Matte Tin/Copper	Quad	S-PQCC-J44	3	4.572 mm	16.5862 mm	No		e2	200 MHz	40 s		245 °C (473 °F)	16.5862 mm	No	36
EP610JMB-35	Altera		Military	J Bend	28	QCCJ	Square	Ceramic	37 ns		Yes			CMOS	38535Q/M;38534H;883B	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		160	1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J28				No		e0	28.6 MHz		16	220 °C (428 °F)
EPM7064SLI68-10	Altera	EE PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	10 ns		Yes		64	CMOS					3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	Yes				1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68				No		e0				220 °C (428 °F)		No
EP22V10LC-10	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V		CMOS		22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	132	1.27 mm	70 °C (158 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.57 mm	11.505 mm	No	Macrocells Interconnected By Global Bus; 10 Macrocells; 1 External Clock	e0	95.2 MHz		10	220 °C (428 °F)	11.505 mm		10
EPM7160SLI84-10	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.5 V	160	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 64 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz	20 s		220 °C (428 °F)	29.3116 mm	Yes	64
EP900JI	Altera	UV PLD	Industrial	J Bend	44	WQCCJ	Square	Ceramic, Glass-Sealed	60 ns		Yes	5.5 V		CMOS		36	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.5 V	240	1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)	Tin Lead	Quad	S-GQCC-J44		4.57 mm	16.51 mm	No	24 Macrocells	e0	20 MHz		24	220 °C (428 °F)	16.51 mm		24
EPM7064AELC44-10	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V	64	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44	1	4.57 mm	16.5862 mm	No	64 MICROCELLS; 4 Labs; Configurable I/O operation with 2.5 V or 3.3 V	e0	100 MHz	20 s		220 °C (428 °F)	16.5862 mm	Yes	36
EPM5128ALC68-20	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	33 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)		Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		66.7 MHz			220 °C (428 °F)	24.2316 mm		52
EPM5192AJM84-15	Altera	UV PLD	Military	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns		Yes	5.5 V	192	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	83.3 MHz			220 °C (428 °F)	29.21 mm	No	64
EPF8636ALI84-A-4	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	1.9 ns		Yes	3.6 V		CMOS				3.3		Chip Carrier				Registered	3 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 68 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Can also operate at 5 V supply						29.3116 mm		68
EPM5032LC28-17	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	17 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)		Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	32 Macrocells; Shared Input/Clock; Shared Product Terms		71.4 MHz				11.5062 mm		16
EP610LC-15	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	17 ns		Yes	5.25 V		CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28				No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	71.4 MHz		16	220 °C (428 °F)			16
EPM7128AELC84-5N	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	3.6 V		CMOS				3.3		Chip Carrier				Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No		e3	192.3 MHz				29.3116 mm		68
EP1800LC-1	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	90 ns		Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68			24.2316 mm	No	48 Macrocells	e0	25 MHz			220 °C (428 °F)	24.2316 mm	No	48
EP1810JM883B	Altera	OT PLD	Military	J Bend	68	QCCJ	Square	Ceramic	50 ns		Yes		48	CMOS	38535Q/M;38534H;883B			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J68				No		e0				220 °C (428 °F)		No
EPF8636ALI84-2	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy		504	Yes	5.5 V		CMOS		68		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 68 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	504 Logic elements; 63 Labs; Configurable I/O operation with 3.3 V or 5 V	e0			64	220 °C (428 °F)	29.3116 mm		68
EPM5032JM5962-25	Altera	UV PLD	Military	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns		Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 16 I/O	7	-55 °C (-67 °F)		Quad	S-CQCC-J28		4.826 mm	11.43 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock		50 MHz				11.43 mm		16
EP910ILI-25	Altera	OT PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	28 ns		Yes	5.5 V		CMOS		36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.5 V	240	1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.585 mm	No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	40 MHz		24	220 °C (428 °F)	16.585 mm		24
EPM7032BLC44-5N	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	3.5 ns		Yes	2.625 V	32	CMOS				2.5	1.8/3.3,2.5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	2.375 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e3	303 MHz				16.5862 mm	Yes	36
EPM7064SLC84-7N	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.25 V	64	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e3	166.7 MHz				29.3116 mm	No	68
EP910JI44-35	Altera	UV PLD	Industrial	J Bend	44	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	38 ns		Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Quad	S-CQCC-J44		4.57 mm	16.51 mm	No	24 Macrocells; 2 External Clocks		28.6 MHz				16.51 mm		24
EPM5032JC28-15	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	15 ns		Yes	5.25 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	320	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	32 Macrocells; Shared Input/Clock; Shared Product Terms	e0	76.9 MHz		16	220 °C (428 °F)	11.43 mm		16
EPF8282ALC100-A-2	Altera	Loadable PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	0.4 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs	4	0 °C (32 °F)		Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No							16.5862 mm
EPF8452LM84-2	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs With Fasttrack Interconnect; 452 Flip Flops; 336 Logic Elements						29.3116 mm		64
EPM5192LC84-1	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	40 ns		Yes	5.25 V	192	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms	e0	50 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM5032JC-15	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	15 ns		Yes	5.25 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	320	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	76.9 MHz		16	220 °C (428 °F)	11.43 mm		16
EPM9320ALC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10.8 ns		Yes	5.25 V	320	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	320 Macrocells; 20 Labs; 484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	144.9 MHz			220 °C (428 °F)	29.3116 mm	Yes	60
EPM7064LC44-10N	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	10 ns		Yes		64	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)		Quad	S-PQCC-J44				No								No
EP220LC-7	Altera	OT PLD	Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.25 V		CMOS		18	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Macrocell	4.75 V	72	1.27 mm	70 °C (158 °F)	9 Dedicated Inputs, 8 I/O	9	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20		4.572 mm	8.9662 mm	No	8 Macrocells	e0	100 MHz		8	220 °C (428 °F)	8.9662 mm		8
EPX880LC84-12	Altera	Flash PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	14 ns	80	Yes	5.25 V		CMOS		62		5	5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	8 Labs; 80 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	58.8 MHz		62	220 °C (428 °F)	29.3116 mm		60
EPM7032LC44-6	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.25 V	32	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44	1	4.572 mm	16.5862 mm	No	Labs interconnected by PIA; 2 Labs; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	200 MHz			220 °C (428 °F)	16.5862 mm	No	36
EPF8282ALI84-4	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy		208	Yes	5.5 V		CMOS		68		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry	e0			64	220 °C (428 °F)	29.3116 mm		64
EPM5128AJC68-15	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns		Yes	5.25 V		CMOS				5		Chip Carrier, Window				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		83.3 MHz				24.13 mm		52
EPF8636ALI84-4N	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)	Matte Tin	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3					29.3116 mm		64
EP512LC-30	Altera		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes			CMOS		22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices				200	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28				No		e0	30 MHz		12	220 °C (428 °F)
EPM5192ALM84-20	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	33 ns		Yes	5.5 V	192	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	66.7 MHz			220 °C (428 °F)	29.3116 mm	No	64

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.