J Bend Programmable Logic Devices (PLD) 2,387

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EP1810LI-20	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.5 V					5		Chip Carrier				Macrocell	4.5 V			85 °C (185 °F)	15 Dedicated Inputs, 45 I/O	15	-40 °C (-40 °F)		Quad	S-PQCC-J68				No			62.5 MHz						45
MPM1810LC-25	Altera	Mask PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	28 ns		Yes	5.25 V		CMOS			5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)		Quad	S-PQCC-J68		4.572 mm	24.2316 mm	No	48 Macrocells; 4 External Clocks; Shared Input/Clock		40 MHz				24.2316 mm		48
EPM7096LC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V	96	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM5128JC	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns		Yes	5.25 V	128	CMOS			5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz			220 °C (428 °F)	24.13 mm	No	52
EPM5192LM	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPF8636ALC84-2	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		504	Yes	5.25 V		CMOS	68		5	5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	504 Logic Elements	e0	417 MHz		64	220 °C (428 °F)	29.3116 mm		68
EPM3064ALI44-7	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	3.6 V	64	CMOS			3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 34 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e0	135.1 MHz			220 °C (428 °F)	16.5862 mm	Yes	34
EPM7064SLC44-6	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.25 V	64	CMOS			5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44	1	4.572 mm	16.5862 mm	No		e0	200 MHz	20 s		220 °C (428 °F)	16.5862 mm	Yes	36
EP22V10LC-7	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	9 ns		Yes	5.25 V		CMOS	22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	132	1.27 mm	70 °C (158 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.57 mm	11.505 mm	No	Macrocells Interconnected By Global Bus; 10 Macrocells; 1 External Clock	e0	109.8 MHz		10	220 °C (428 °F)	11.505 mm		10
EP610LI28-20	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	22 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	16 Macrocells; 2 External Clocks		62.5 MHz				11.5062 mm		16
EP610LI-15	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V					5		Chip Carrier				Macrocell	4.5 V			85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J28				No			83.3 MHz						16
EP610ALC-12	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.25 V		CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	83.3 MHz		16	220 °C (428 °F)	11.5062 mm		16
EP1800LC-3	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy			Yes	5.25 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68			24.2316 mm	No	48 Macrocells	e0	18.5 MHz			220 °C (428 °F)	24.2316 mm	No	48
EPM7032SLI44-5	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	3.6 V	32	CMOS			3.3	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 32 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	Can also operate with 3.3 V supply	e0	250 MHz			220 °C (428 °F)	16.5862 mm	Yes	32
EPM5128JM-2	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	45 ns		Yes	5.5 V		CMOS			5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz				24.13 mm		52
EP610JM5962-35	Altera	UV PLD	Military	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	37 ns		Yes	5.5 V		CMOS			5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)		Quad	S-CQCC-J28		4.826 mm	11.43 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks		28.6 MHz				11.43 mm		16
EP312LC-25	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.25 V		CMOS	22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	200	1.27 mm	70 °C (158 °F)	8 Dedicated Inputs, 12 I/O	8	0 °C (32 °F)	Tin/Lead	Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	12 Macrocells	e0	66 MHz	30 s	12	220 °C (428 °F)	11.5062 mm		12
EPM5128LI	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V	128	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 52 I/O	7	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz			220 °C (428 °F)	24.23 mm	No	52
EPF8282LI84-2	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS			5		Chip Carrier				Registered	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry						29.3116 mm		64
EPM5032JI	Altera		Industrial	J Bend	28	QCCJ	Square	Ceramic	25 ns		Yes			CMOS	24	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices				320	1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Quad	S-XQCC-J28				No		e0	62.5 MHz		16	220 °C (428 °F)
EPM3064ALC44-7	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	3.6 V	64	CMOS			3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 34 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44	1	4.572 mm	16.5862 mm	No		e0	135.1 MHz	20 s		220 °C (428 °F)	16.5862 mm	Yes	34
EPM5128AJM68-15	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns		Yes	5.5 V		CMOS			5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		83.3 MHz				24.13 mm		52
EPM7096SLC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V	96	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz			220 °C (428 °F)	29.3116 mm	No	60
EPM7128SLI84-15	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V	128	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 64 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	76.9 MHz			220 °C (428 °F)	29.3116 mm	Yes	64
EPF8452ALC84-4N	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		336	Yes	5.25 V		CMOS	68		5	3.3,3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	336 Logic Elements	e3		30 s	68	245 °C (473 °F)	29.3116 mm		68
EP910LI-25	Altera	OT PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V					5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No							16.5862 mm		24
EP1800JM	Altera	UV PLD	Military	J Bend	68	QCCJ	Square	Ceramic	90 ns		Yes		48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J68				No		e0				220 °C (428 °F)		No
EPS464LC-20	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.25 V		CMOS			5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 32 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No	Macrocells Interconnected By Global Bus; Synchronous Timing Generator; 64 Macrocells	e0	66.7 MHz			220 °C (428 °F)	16.5862 mm		32
EPM7064LC68-6	Altera	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.25 V	64	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 48 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	151.5 MHz			220 °C (428 °F)	24.23 mm	No	48
EPF8282LC84-2	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		208	Yes	5.25 V		CMOS	68		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 64 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry	e0			64	220 °C (428 °F)	29.3116 mm		64
EPM5064LI44	Altera	OT PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V	64	CMOS			5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 28 I/O	7	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	64 Macrocells; Shared Input/Clock; Shared Product Terms	e0	33.3 MHz			220 °C (428 °F)	16.5862 mm	No	28
EPF8452ALI84-A-2	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	1.7 ns		Yes	3.6 V		CMOS			3.3		Chip Carrier				Registered	3 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 68 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Can also operate at 5 V supply						29.3116 mm		68
EP1810JM-45	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	50 ns		Yes	5.5 V	48	CMOS			5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	22.2 MHz			220 °C (428 °F)	24.13 mm	No	48
EP220LC-10	Altera	OT PLD	Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V		CMOS	18	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Macrocell	4.75 V	72	1.27 mm	70 °C (158 °F)	9 Dedicated Inputs, 8 I/O	9	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20		4.572 mm	8.9662 mm	No	8 Macrocells	e0	62.5 MHz		8	220 °C (428 °F)	8.9662 mm		8
EPM7064BLC44-5	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	2.625 V	64	CMOS			2.5	1.8/3.3,2.5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	2.375 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e0	212.8 MHz			220 °C (428 °F)	16.5862 mm	Yes	36
EP610ILI-25	Altera		Industrial	J Bend	28	QCCJ	Square	Plastic	25 ns		Yes			CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		160	1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J28				No		e0	40 MHz		16	220 °C (428 °F)
EP610ILI-15	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	18 ns		Yes	5.5 V		CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	160	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J28				No		e0	66 MHz		16	220 °C (428 °F)			16
EPM7064SLI84-5N	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	5 ns		Yes		64	CMOS				3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes				1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)		Quad	S-PQCC-J84				No								No
EPM5064AJC-15	Altera	UV PLD	Commercial	J Bend	44	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns		Yes	5.25 V		CMOS			5		Chip Carrier, Window				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 28 I/O	7	0 °C (32 °F)		Quad	S-CQCC-J44		4.57 mm	16.51 mm	No	Labs interconnected by PIA; 4 Labs; 64 Macrocells; 1 External Clock; Shared Input/Clock		83.3 MHz				16.51 mm		28
EP610LC28-25	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	27 ns		Yes	5.25 V		CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	16 Macrocells; 2 External Clocks	e0	47.6 MHz		16	220 °C (428 °F)	11.5062 mm		16
EPM7096JC68-3	Altera	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.25 V	96	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 52 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No		e0				220 °C (428 °F)	24.2316 mm	No	52
EPM5128JC-1	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	40 ns		Yes	5.25 V	128	CMOS			5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz			220 °C (428 °F)	24.13 mm	No	52
EPM5192LC	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.25 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin/Lead	Quad	S-PQCC-J84				No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz	30 s		220 °C (428 °F)		No	64
EPM7032SLI44-6N	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	6 ns		Yes		32	CMOS			5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes				1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)		Quad	S-PQCC-J44				No								Yes
EPM7160SLI84-10N	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.5 V	160	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 64 I/O	0	-40 °C (-40 °F)	Matte Tin	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e3	125 MHz				29.3116 mm	Yes	64
EPM7160ELC84-12	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.25 V	160	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz	20 s		220 °C (428 °F)	29.3116 mm	No	64
EP1210JI-1	Altera	UV PLD	Industrial	J Bend	44	WQCCJ	Square	Ceramic, Glass-Sealed	50 ns		Yes	5.5 V		CMOS			5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Quad	S-GQCC-J44		4.57 mm	16.51 mm	No	28 Macrocells		28.5 MHz				16.51 mm		24
EPM7064SLI44-6	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.5 V	64	CMOS			5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 36 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	64 Macrocells	e0	200 MHz			220 °C (428 °F)	16.5862 mm	No	36

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.