J Bend Programmable Logic Devices (PLD) 2,387

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
5962-01-364-7971	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	70 ns		Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68	1			No		e0						No
EP610LI-20T	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	22 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J28		4.57 mm	11.505 mm	No			55.6 MHz				11.505 mm		16
EPM7032AELC44-5	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	3.6 V	32	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	32 Macrocells	e0	250 MHz			220 °C (428 °F)	16.5862 mm	Yes	36
EP600JM883B	Altera	UV PLD	Military	J Bend	28	QCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns		Yes	5.5 V		CMOS	MIL-STD-883 Class B	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	160	1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	16 Macrocells	e0	22.2 MHz		16	220 °C (428 °F)	11.43 mm		16
EPM7064LI44-6	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.5 V	64	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 36 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	64 Macrocells	e0	200 MHz			220 °C (428 °F)	16.5862 mm	No	36
EPM7128SLC84-7F	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No			166.7 MHz				29.3116 mm		68
EPM7064LC44-7	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.25 V	64	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44	1	4.572 mm	16.5862 mm	No	Labs interconnected by PIA; 4 Labs; 64 Macrocells; 1 External Clock; Shared Input/Clock	e0	166.7 MHz	20 s		220 °C (428 °F)	16.5862 mm	No	36
EPM7032LI44-15T	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V	32	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 32 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e0	76.9 MHz			220 °C (428 °F)	16.5862 mm	No	32
EPM7064ALC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V		CMOS				3.3		Chip Carrier				Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	64 Macrocells; 4 Labs; Configurable I/O operation with 2.5 V or 3.3 V		125 MHz				29.3116 mm		68
EP610ALC28-10	Altera	EE PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	16 Macrocells; 2 External Clocks		100 MHz				11.5062 mm		16
EPM7096LC68-12	Altera	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.25 V	96	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 52 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68	3	5.08 mm	24.2316 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz			220 °C (428 °F)	24.2316 mm	No	52
EPM7128AELI84-6	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	3.6 V	128	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No		e0	166.7 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPX740LC44-15	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	18 ns	40	Yes	5.25 V		CMOS		32		5	5 V	Chip Carrier	LDCC44,.7SQ	Field Programmable Gate Arrays		Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 30 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	4 Labs; 40 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	50 MHz		32	220 °C (428 °F)	16.5862 mm		30
EPM7160ELC84-10P	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V	160	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz			220 °C (428 °F)	29.3116 mm	No	60
EPM7032VLC44-15	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	3.6 V	32	CMOS				3.3	3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 32 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	Labs interconnected by PIA; 2 Labs; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	76.9 MHz			220 °C (428 °F)	16.5862 mm	No	32
EPM5130LC-1	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	40 ns		Yes	5.25 V	128	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	19 Dedicated Inputs, 48 I/O	19	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84				No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz			220 °C (428 °F)		No	48
EPM5032ALC-10	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	320	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.57 mm	11.5062 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	125 MHz		16	220 °C (428 °F)	11.5062 mm		16
EPM5128JC68-1	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	40 ns		Yes	5.25 V	128	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms	e0	50 MHz			220 °C (428 °F)	24.13 mm	No	52
EPM7096LI68-10	Altera	EE PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.5 V	96	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 48 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz			220 °C (428 °F)	24.2316 mm	No	48
EPF8282VLI84-4	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy		208	Yes	3.6 V		CMOS		68		3.3	3.3 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	3 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry	e0			64	220 °C (428 °F)	29.3116 mm		64
EPM5127LC	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy			Yes		128	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44				No		e0				220 °C (428 °F)		No
EPM7096SLC68-15	Altera	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V	96	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 48 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	76.9 MHz			220 °C (428 °F)	24.23 mm	No	48
EPM7064AELI44-4	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	4.5 ns		Yes	3.6 V	64	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 36 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e0	222.2 MHz			220 °C (428 °F)	16.5862 mm	Yes	36
EPM5192ALC84-20	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	33 ns		Yes	5.25 V	192	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	66.7 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPS464LC44-20	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 32 I/O	0	0 °C (32 °F)		Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No	64 Macrocells; Shared Input/Clock; Shared Product Terms		66.7 MHz				16.5862 mm		32
EP600JC-1	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns		Yes	5.25 V		CMOS		20	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	16 Macrocells	e0	45.5 MHz		16	220 °C (428 °F)	11.43 mm		16
EPM7032AELI44-7	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	3.6 V	32	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 36 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	32 Macrocells	e0	138.9 MHz			220 °C (428 °F)	16.5862 mm	Yes	36
EPM7064SLC84-5N	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	5.25 V	64	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	64 Macrocells	e3	250 MHz				29.3116 mm	No	68
EPM5130LI	Altera	OT PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V	128	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	19 Dedicated Inputs, 48 I/O	19	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84				No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz			220 °C (428 °F)		No	48
EPF8282ALC100-A-4	Altera	Loadable PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	0.6 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs	4	0 °C (32 °F)		Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No							16.5862 mm
EPM3032ALI44-10N	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V	32	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 34 I/O	0	-40 °C (-40 °F)	Matte Tin	Quad	S-PQCC-J44	3	4.572 mm	16.5862 mm	No		e3	103.1 MHz	30 s		245 °C (473 °F)	16.5862 mm	Yes	34
EPM7064AELC44-7	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	3.6 V	64	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44	1	4.57 mm	16.5862 mm	No	64 MICROCELLS; 4 Labs; Configurable I/O operation with 2.5 V or 3.3 V	e0	135.1 MHz	20 s		220 °C (428 °F)	16.5862 mm	Yes	36
EP910TLC-30	Altera		Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	33 ns		Yes			CMOS		36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell		240	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44				No		e0	33.3 MHz		24	220 °C (428 °F)
EPF8282ALC84-4N	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		208	Yes	5.25 V		CMOS		68		5	3.3,3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	208 Logic Elements	e3		30 s	68	245 °C (473 °F)	29.3116 mm		68
EPM5128LM-2	Altera	OT PLD	Military	J Bend	68	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz				24.23 mm		52
EPM7032SLC44-5N	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	5.25 V	32	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J44	3	4.572 mm	16.5862 mm	No		e3	250 MHz				16.5862 mm	Yes	36
EPF8636ALM84-4	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V						29.3116 mm		64
EPF8282ALI100-A-3	Altera	Loadable PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	0.5 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 78 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No			95 MHz				16.5862 mm		78
EP1810JI68-45	Altera	UV PLD	Industrial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	50 ns		Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells; Shared Input/Clock		22.2 MHz				24.13 mm		48
EPM7128ELC84-12	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.25 V	128	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	128 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e0	125 MHz	20 s		220 °C (428 °F)	29.3116 mm	No	68
EPF8452ALI84-2	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy		336	Yes	5.5 V		CMOS		68		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 68 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	336 Logic elements; 42 Labs; Configurable I/O operation with 3.3 V or 5 V	e0			64	220 °C (428 °F)	29.3116 mm		68
EPM7064SLI84-7	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.5 V	64	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	64 Macrocells	e0	166.7 MHz	20 s		220 °C (428 °F)	29.3116 mm	Yes	68
EPM7064LC84-6	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.25 V	64	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	151.5 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM3064ALC44-4N	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	4.5 ns		Yes	3.6 V	64	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 34 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J44	3	4.572 mm	16.5862 mm	No		e3	222.2 MHz	30 s		245 °C (473 °F)	16.5862 mm	Yes	34
EP1810JC-55	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Ceramic			Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-XQCC-J68				No		e0				220 °C (428 °F)		No
EPF8282ALC84-4	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		208	Yes	5.25 V		CMOS		68		5	5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	208 Logic Elements	e0	357 MHz	20 s	64	220 °C (428 °F)	29.3116 mm		68
EPF8282ALI84-3	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy		208	Yes	5.5 V		CMOS		68		5	5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 68 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	208 Logic Elements	e0	385 MHz		64	220 °C (428 °F)	29.3116 mm		68
EPM7032BLI44	Altera	EE PLD		J Bend	44	QCCJ	Square	Plastic/Epoxy			Yes	2.625 V		CMOS				2.5		Chip Carrier				Macrocell	2.375 V		1.27 mm		4 Dedicated Inputs, 36 I/O	4			Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No							16.5862 mm		36

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.