J Bend Programmable Logic Devices (PLD) 2,387

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EP910LI-30	Altera	OT PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	30 ns		Yes	5.5 V						5		Chip Carrier				Macrocell	4.5 V			85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Quad	S-PQCC-J44				No			41.7 MHz						24
EPM5128AJC-15	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns		Yes	5.25 V	128	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	83.3 MHz			220 °C (428 °F)	24.13 mm	No	52
EPM5127LC-2	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy			Yes		128	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44				No		e0				220 °C (428 °F)		No
EPM7032LC44-15H	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)		Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No			100 MHz				16.5862 mm		36
EP910ILC-12	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V		CMOS		36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.75 V	240	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44				No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	76.9 MHz		24	220 °C (428 °F)			24
EPM5016LI-17	Altera		Industrial	J Bend	20	QCCJ	Square	Plastic/Epoxy	17 ns		Yes			CMOS		16	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices				160	1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J20				No		e0			8	220 °C (428 °F)
EP600LI	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V		CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	160	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J28			11.5316 mm	No	16 Macrocells	e0	22.2 MHz		16	220 °C (428 °F)	11.5316 mm		16
EP600LI-3	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.5 V		CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	160	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J28			11.5316 mm	No	16 Macrocells	e0	26.3 MHz		16	220 °C (428 °F)	11.5316 mm		16
EP1210JC-2	Altera	UV PLD	Commercial	J Bend	44	WQCCJ	Square	Ceramic, Glass-Sealed	65 ns		Yes	5.25 V		CMOS		36	PAL-TYPE	5		Chip Carrier, Window	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.75 V	236	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-GQCC-J44		4.57 mm	16.51 mm	No	28 Macrocells	e0	23.2 MHz		24	220 °C (428 °F)	16.51 mm		24
EPM5032LI28-25	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.5 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	320	1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 16 I/O	7	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J28		4.57 mm	11.5062 mm	No	32 Macrocells; Shared Input/Clock; Shared Product Terms	e0	50 MHz		16	220 °C (428 °F)	11.5062 mm		16
EP22V10LI-15	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V		CMOS		22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	132	1.27 mm	85 °C (185 °F)	11 Dedicated Inputs, 10 I/O	11	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J28		4.57 mm	11.505 mm	No	Macrocells Interconnected By Global Bus; 10 Macrocells; 1 External Clock	e0	64.5 MHz		10	220 °C (428 °F)	11.505 mm		10
EPM7064SLC84-6	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.25 V	64	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	200 MHz	20 s		220 °C (428 °F)	29.3116 mm	Yes	68
EP1810JC-20	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	22 ns		Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	50 MHz			220 °C (428 °F)	24.13 mm	No	48
EPF10K20LI84-4	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	23.8 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	1152 Logic elements; Built-in JTAG boundry-scan test circuitry		60.6 MHz				29.3116 mm
EPM7032SLC44-15	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V	32	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 32 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e0	76.9 MHz			220 °C (428 °F)	16.5862 mm	No	32
EPM7064AELI44-10	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V	64	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 36 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	64 Macrocells	e0	100 MHz			220 °C (428 °F)	16.5862 mm	Yes	36
EPM5128JC68-2	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	45 ns		Yes	5.25 V		CMOS				5		Chip Carrier, Window				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms		40 MHz				24.13 mm		52
EPM5192ALM84-15	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.5 V	192	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	83.3 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPS448LC-25	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes	5.25 V		CMOS				5		Chip Carrier				Registered	4.75 V		1.27 mm	70 °C (158 °F)	8 Dedicated Inputs, 0 I/O	8	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	Stand-Alone Microsequencer	e0	25 MHz			220 °C (428 °F)	11.5062 mm		0
EPM7128LC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V	128	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells; Shared Input/Clock	e0	100 MHz			220 °C (428 °F)	29.3116 mm	No	64
EP610LI-35	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	37 ns		Yes	5.5 V		CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	160	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J28				No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	28.6 MHz		16	220 °C (428 °F)			16
EP910ALC44-10	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	11 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)		Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No	24 Macrocells; 2 External Clocks		100 MHz				16.5862 mm		24
MPM5032LC-20	Altera	Mask PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)		Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock		62.5 MHz			220 °C (428 °F)	11.5062 mm		16
EP610ALC-7	Altera		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes			CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		160	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28				No		e0			16	220 °C (428 °F)
EPF8452ALC84-6	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		336	Yes	5.25 V		CMOS		68		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 64 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	452 Flip Flops; 336 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0			64	220 °C (428 °F)	29.3116 mm		64
EPM7128ELI84-20	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.5 V	128	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	128 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e0	83.3 MHz	20 s		220 °C (428 °F)	29.3116 mm	No	68
EPM7064LI68-6	Altera	EE PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.5 V	64	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 52 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	64 Macrocells	e0	200 MHz			220 °C (428 °F)	24.23 mm	No	52
EPM7064BLI44-5	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	2.625 V	64	CMOS				2.5	1.8/3.3,2.5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	2.375 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 36 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e0	212.8 MHz			220 °C (428 °F)	16.5862 mm	Yes	36
EP1810JI68-25	Altera	UV PLD	Industrial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	28 ns		Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells; Shared Input/Clock		40 MHz				24.13 mm		48
EPF10K10LI84-5	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	27 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	576 Logic elements; Built-in JTAG boundry-scan test circuitry		53.76 MHz				29.3116 mm
EPM3064ALI44-4	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	4.5 ns		Yes	3.6 V	64	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 34 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e0	222.2 MHz			220 °C (428 °F)	16.5862 mm	Yes	34
EP1800JM883B	Altera	UV PLD	Military	J Bend	68	QCCJ	Square	Ceramic	90 ns		Yes		48	CMOS	38535Q/M;38534H;883B			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J68				No		e0				220 °C (428 °F)		No
EPF8452ALI84-A-3	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	1.8 ns		Yes	3.6 V		CMOS				3.3		Chip Carrier				Registered	3 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 68 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Can also operate at 5 V supply						29.3116 mm		68
5962-01-381-7778	Altera		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes			CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		160	1.27 mm	70 °C (158 °F)			0 °C (32 °F)		Quad	S-PQCC-J28				No			18.2 MHz		16
EPM7096SLC68-10	Altera	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V	96	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 48 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz			220 °C (428 °F)	24.23 mm	No	48
EPF8282ALC84-2A	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.25 V		CMOS				5		Chip Carrier				Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	208 Logic Elements					220 °C (428 °F)	29.3116 mm		68
EPM7096LC68-10H	Altera	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 52 I/O	0	0 °C (32 °F)		Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No			125 MHz				24.2316 mm		52
EPF8452ALC84-A-3	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	1.8 ns		Yes	3.6 V		CMOS				3.3		Chip Carrier				Registered	3 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Can also operate at 5 V supply						29.3116 mm		68
EPM7032JC44-15	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V	32	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No		e0	100 MHz			220 °C (428 °F)	16.5862 mm	No	36
EP312LI-30	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	30 ns		Yes	5.5 V		CMOS		22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	200	1.27 mm	85 °C (185 °F)	8 Dedicated Inputs, 12 I/O	8	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	12 Macrocells	e0	50 MHz		12	220 °C (428 °F)	11.5062 mm		12
EP224LC-12	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.25 V		CMOS		22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	72	1.27 mm	70 °C (158 °F)	13 Dedicated Inputs, 8 I/O	13	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	8 Macrocells	e0	90.9 MHz		8	220 °C (428 °F)	11.5062 mm		8
EPM5128LI68-2	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.5 V	128	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 52 I/O	7	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No		e0	40 MHz			220 °C (428 °F)	24.23 mm	No	52
EPF8452LC84-3	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		336	Yes	5.25 V		CMOS		68		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 64 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	452 Flip Flops; 336 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0			64	220 °C (428 °F)	29.3116 mm		64
EP1830LI-30	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	34 ns		Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68				No		e0				220 °C (428 °F)		No
EPM7032LI44-6	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.5 V	32	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 36 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	32 Macrocells	e0	200 MHz			220 °C (428 °F)	16.5862 mm	No	36
EPM7128LI84-20	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.5 V	128	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 64 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells; Shared Input/Clock	e0	62.5 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM5128ALI68-15	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 52 I/O	7	-40 °C (-40 °F)		Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		83.3 MHz				24.2316 mm		52
EPM7128AELI84-7	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	3.6 V	128	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No		e0	129.9 MHz			220 °C (428 °F)	29.3116 mm	Yes	68

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.