J Bend Programmable Logic Devices (PLD) 2,387

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Part RoHS Manufacturer Programmable IC Type Grading Of Temperature Form Of Terminal No. of Terminals Package Code Package Shape Package Body Material Propagation Delay No. of Logic Cells Surface Mount Maximum Supply Voltage No. of Macro Cells Technology Used Screening Level No. of Inputs Architecture Nominal Supply Voltage (V) Packing Method Power Supplies (V) Package Style (Meter) Package Equivalence Code Sub-Category In-System Programmable Output Function Minimum Supply Voltage No. of Product Terms Pitch Of Terminal Maximum Operating Temperature Organization No. of Dedicated Inputs Minimum Operating Temperature Finishing Of Terminal Used Position Of Terminal JESD-30 Code Moisture Sensitivity Level (MSL) Maximum Seated Height Width Qualification Additional Features JESD-609 Code Maximum Clock Frequency Maximum Time At Peak Reflow Temperature (s) No. of Outputs Peak Reflow Temperature (C) Length JTAG Boundary Scan Test No. of I/O Lines

EP1800ILC-70

Altera

OT PLD

Commercial

J Bend

68

QCCJ

Square

Plastic

70 ns

Yes

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

1.27 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J68

No

e0

220 °C (428 °F)

No

EPM7064SLI84-5

Altera

EE PLD

Industrial

J Bend

84

QCCJ

Square

Plastic/Epoxy

5 ns

Yes

5.5 V

64

CMOS

5

3.3/5,5 V

Chip Carrier

LDCC84,1.2SQ

Programmable Logic Devices

Yes

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

0 Dedicated Inputs, 68 I/O

0

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

64 Macrocells

e0

250 MHz

220 °C (428 °F)

29.3116 mm

No

68

EPM7096LC84-2

Altera

EE PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

15 ns

Yes

5.25 V

96

CMOS

5

5 V

Chip Carrier

LDCC84,1.2SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 64 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

e0

220 °C (428 °F)

29.3116 mm

No

64

EP1800ILC-90

Altera

OT PLD

Commercial

J Bend

68

QCCJ

Square

Plastic

90 ns

Yes

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

1.27 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J68

No

e0

220 °C (428 °F)

No

EPS448LC-20

Altera

OT PLD

Commercial

J Bend

28

QCCJ

Square

Plastic/Epoxy

Yes

5.25 V

CMOS

5

Chip Carrier

Registered

4.75 V

1.27 mm

70 °C (158 °F)

8 Dedicated Inputs, 0 I/O

8

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J28

4.572 mm

11.5062 mm

No

Stand-Alone Microsequencer

e0

20 MHz

220 °C (428 °F)

11.5062 mm

0

EPF8452ALC84-4

Altera

Loadable PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

336

Yes

5.25 V

CMOS

68

5

3.3/5,5 V

Chip Carrier

LDCC84,1.2SQ

Field Programmable Gate Arrays

Registered

4.75 V

1.27 mm

70 °C (158 °F)

4 Dedicated Inputs, 68 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J84

3

5.08 mm

29.3116 mm

No

336 Logic Elements

e0

357 MHz

20 s

64

220 °C (428 °F)

29.3116 mm

68

5962-8946901XX

Altera

UV PLD

Military

J Bend

68

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

50 ns

Yes

5.5 V

CMOS

5

Chip Carrier, Window

Macrocell

4.5 V

125 °C (257 °F)

12 Dedicated Inputs, 48 I/O

12

-55 °C (-67 °F)

Quad

S-CQCC-J68

No

48 Macrocells; 4 External Clocks; Shared Input/Clock

22.2 MHz

48

EPM5128JM883B

Altera

UV PLD

Military

J Bend

68

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

55 ns

Yes

128

CMOS

38535Q/M;38534H;883B

5

5 V

Chip Carrier, Window

LDCC68,1.0SQ

Programmable Logic Devices

No

Macrocell

1.27 mm

125 °C (257 °F)

7 Dedicated Inputs, 52 I/O

7

-55 °C (-67 °F)

Tin Lead

Quad

S-CQCC-J68

5.08 mm

24.13 mm

No

Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock

e0

33.3 MHz

220 °C (428 °F)

24.13 mm

No

52

EPM7128SLI84-7N

Altera

EE PLD

Industrial

J Bend

84

QCCJ

Square

Plastic/Epoxy

7.5 ns

Yes

128

CMOS

3.3/5,5 V

Chip Carrier

LDCC84,1.2SQ

Programmable Logic Devices

Yes

1.27 mm

85 °C (185 °F)

-40 °C (-40 °F)

Quad

S-PQCC-J84

No

Yes

EP630JI-20

Altera

Industrial

J Bend

28

QCCJ

Square

Ceramic

22 ns

Yes

CMOS

20

PAL-TYPE

5

5 V

Chip Carrier

LDCC28,.5SQ

Programmable Logic Devices

Macrocell

160

1.27 mm

85 °C (185 °F)

-40 °C (-40 °F)

Tin Lead

Quad

S-XQCC-J28

No

e0

55.5 MHz

16

220 °C (428 °F)

EP1810LC-55

Altera

OT PLD

Commercial

J Bend

68

QCCJ

Square

Plastic/Epoxy

Yes

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

1.27 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J68

No

e0

220 °C (428 °F)

No

EP610ALI-12

Altera

OT PLD

Industrial

J Bend

28

QCCJ

Square

Plastic/Epoxy

12 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

4 Dedicated Inputs, 16 I/O

4

-40 °C (-40 °F)

Quad

S-PQCC-J28

4.572 mm

11.5062 mm

No

Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks

83.3 MHz

11.5062 mm

16

EPM7064SLC68-15

Altera

EE PLD

Commercial

J Bend

68

QCCJ

Square

Plastic/Epoxy

15 ns

Yes

5.25 V

64

CMOS

5

3.3/5,5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

Yes

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 48 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J68

5.08 mm

24.23 mm

No

Configurable I/O operation with 3.3 V or 5 V

e0

76.9 MHz

220 °C (428 °F)

24.23 mm

No

48

EPF8282VLM84-4

Altera

Loadable PLD

Military

J Bend

84

QCCJ

Square

Plastic/Epoxy

Yes

CMOS

3.3

Chip Carrier

Registered

1.27 mm

125 °C (257 °F)

4 Dedicated Inputs, 64 I/O

4

-55 °C (-67 °F)

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry

29.3116 mm

64

EPM7032VLC44-20

Altera

EE PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

20 ns

Yes

3.6 V

32

CMOS

3.3

3.3 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

No

Macrocell

3 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 32 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J44

4.57 mm

16.5862 mm

No

Labs interconnected by PIA; 2 Labs; 32 Macrocells; 1 External Clock; Shared Input/Clock

e0

62.5 MHz

220 °C (428 °F)

16.5862 mm

No

32

EPF8452ALC84-3N

Altera

Loadable PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

Yes

5.25 V

CMOS

5

Chip Carrier

Registered

4.75 V

1.27 mm

70 °C (158 °F)

4 Dedicated Inputs, 68 I/O

4

0 °C (32 °F)

Matte Tin

Quad

S-PQCC-J84

3

5.08 mm

29.3116 mm

No

336 Logic Elements

e3

29.3116 mm

68

EPM7128SLC84-15F

Altera

EE PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

15 ns

Yes

5.25 V

CMOS

5

Chip Carrier

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 68 I/O

0

0 °C (32 °F)

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

100 MHz

29.3116 mm

68

EPM5128ALM68-12

Altera

OT PLD

Military

J Bend

68

QCCJ

Square

Plastic/Epoxy

20 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

125 °C (257 °F)

7 Dedicated Inputs, 52 I/O

7

-55 °C (-67 °F)

Quad

S-PQCC-J68

5.08 mm

24.2316 mm

No

Labs interconnected by PIA; 8 Labs; 1 External Clock

111.1 MHz

24.2316 mm

52

EP1830LI-25

Altera

OT PLD

Industrial

J Bend

68

QCCJ

Square

Plastic/Epoxy

28 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 48 I/O

12

-40 °C (-40 °F)

Quad

S-PQCC-J68

4.572 mm

24.2316 mm

No

48 Macrocells; 4 External Clocks; Shared Input/Clock

40 MHz

24.2316 mm

48

EPF8282ALC84-2N

Altera

Loadable PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

Yes

5.25 V

CMOS

5

Chip Carrier

Registered

4.75 V

1.27 mm

70 °C (158 °F)

4 Dedicated Inputs, 68 I/O

4

0 °C (32 °F)

Matte Tin

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

208 Logic Elements

e3

29.3116 mm

68

EPM7096SLI68-10

Altera

EE PLD

Industrial

J Bend

68

QCCJ

Square

Plastic/Epoxy

10 ns

Yes

5.5 V

96

CMOS

5

3.3/5,5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

Yes

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

0 Dedicated Inputs, 48 I/O

0

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J68

5.08 mm

24.23 mm

No

Configurable I/O operation with 3.3 V or 5 V

e0

100 MHz

220 °C (428 °F)

24.23 mm

No

48

EPS464LC44-25

Altera

OT PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

25 ns

Yes

5.25 V

CMOS

5

Chip Carrier

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 32 I/O

0

0 °C (32 °F)

Quad

S-PQCC-J44

4.572 mm

16.5862 mm

No

64 Macrocells; Shared Input/Clock; Shared Product Terms

50 MHz

16.5862 mm

32

EPF8636ALI84-A-3

Altera

Loadable PLD

Industrial

J Bend

84

QCCJ

Square

Plastic/Epoxy

1.8 ns

Yes

3.6 V

CMOS

3.3

Chip Carrier

Registered

3 V

1.27 mm

85 °C (185 °F)

4 Dedicated Inputs, 68 I/O

4

-40 °C (-40 °F)

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

Can also operate at 5 V supply

29.3116 mm

68

EPM7128AELI84-10

Altera

EE PLD

Industrial

J Bend

84

QCCJ

Square

Plastic/Epoxy

10 ns

Yes

3.6 V

128

CMOS

3.3

2.5/3.3,3.3 V

Chip Carrier

LDCC84,1.2SQ

Programmable Logic Devices

Yes

Macrocell

3 V

1.27 mm

85 °C (185 °F)

0 Dedicated Inputs, 68 I/O

0

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

e0

98 MHz

220 °C (428 °F)

29.3116 mm

Yes

68

EPM7032LC44-12

Altera

EE PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

12 ns

Yes

5.25 V

32

CMOS

5

5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 36 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J44

4.572 mm

16.5862 mm

No

Labs interconnected by PIA; 2 Labs; 32 Macrocells; 1 External Clock; Shared Input/Clock

e0

125 MHz

220 °C (428 °F)

16.5862 mm

No

36

EPM7064BLI44-7N

Altera

EE PLD

J Bend

44

QCCJ

Square

Plastic/Epoxy

7.5 ns

Yes

64

CMOS

1.8/3.3,2.5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

Yes

1.27 mm

Matte Tin

Quad

S-PQCC-J44

1

No

e3

Yes

EP900JI-3

Altera

UV PLD

Industrial

J Bend

44

WQCCJ

Square

Ceramic, Glass-Sealed

50 ns

Yes

5.5 V

CMOS

5

Chip Carrier, Window

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Quad

S-GQCC-J44

4.57 mm

16.51 mm

No

24 Macrocells

23.8 MHz

16.51 mm

24

EPF8452ALC84-3H

Altera

Loadable PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

Yes

5.25 V

CMOS

5

Chip Carrier

Registered

4.75 V

1.27 mm

70 °C (158 °F)

4 Dedicated Inputs, 68 I/O

4

0 °C (32 °F)

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

29.3116 mm

68

EP610LI-30

Altera

OT PLD

Industrial

J Bend

28

QCCJ

Square

Plastic/Epoxy

32 ns

Yes

5.5 V

CMOS

20

PAL-TYPE

5

5 V

Chip Carrier

LDCC28,.5SQ

Programmable Logic Devices

Macrocell

4.5 V

160

1.27 mm

85 °C (185 °F)

4 Dedicated Inputs, 16 I/O

4

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J28

No

Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks

e0

33.3 MHz

16

220 °C (428 °F)

16

EP610LI28-25

Altera

OT PLD

Industrial

J Bend

28

QCCJ

Square

Plastic/Epoxy

27 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

4 Dedicated Inputs, 16 I/O

4

-40 °C (-40 °F)

Quad

S-PQCC-J28

4.572 mm

11.5062 mm

No

16 Macrocells; 2 External Clocks

47.6 MHz

11.5062 mm

16

EP910LI44-35

Altera

OT PLD

Industrial

J Bend

44

QCCJ

Square

Plastic/Epoxy

38 ns

Yes

5.5 V

CMOS

36

PAL-TYPE

5

5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

Macrocell

4.5 V

240

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J44

4.57 mm

16.5862 mm

No

24 Macrocells; 2 External Clocks

e0

37 MHz

24

220 °C (428 °F)

16.5862 mm

24

5962-01-364-7996

Altera

Industrial

J Bend

28

QCCJ

Square

Plastic/Epoxy

37 ns

Yes

CMOS

20

PAL-TYPE

5

5 V

Chip Carrier

LDCC28,.5SQ

Programmable Logic Devices

Macrocell

160

1.27 mm

85 °C (185 °F)

-40 °C (-40 °F)

Quad

S-PQCC-J28

No

28.6 MHz

16

EPF8452ALI84-5

Altera

Loadable PLD

Industrial

J Bend

84

QCCJ

Square

Plastic/Epoxy

Yes

5.5 V

CMOS

5

Chip Carrier

Registered

4.5 V

1.27 mm

85 °C (185 °F)

4 Dedicated Inputs, 64 I/O

4

-40 °C (-40 °F)

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

452 Flip Flops; 336 Logic Elements

29.3116 mm

64

EPM7128ELC84-6

Altera

EE PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

6 ns

Yes

128

CMOS

3.3/5,5 V

Chip Carrier

LDCC84,1.2SQ

Programmable Logic Devices

No

1.27 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J84

No

e0

220 °C (428 °F)

No

EP1810LC68-25T

Altera

OT PLD

Commercial

J Bend

68

QCCJ

Square

Plastic/Epoxy

28 ns

Yes

5.25 V

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

12 Dedicated Inputs, 48 I/O

12

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J68

5.08 mm

24.2316 mm

No

48 Macrocells; Shared Input/Clock

e0

40 MHz

220 °C (428 °F)

24.2316 mm

No

48

EPM7128ELI84-10P

Altera

EE PLD

Industrial

J Bend

84

QCCJ

Square

Plastic/Epoxy

10 ns

Yes

5.5 V

128

CMOS

5

3.3/5,5 V

Chip Carrier

LDCC84,1.2SQ

Programmable Logic Devices

No

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

0 Dedicated Inputs, 68 I/O

0

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

128 Macrocells

e0

125 MHz

220 °C (428 °F)

29.3116 mm

No

68

5962-01-393-1609

Altera

Military

J Bend

44

QCCJ

Square

Ceramic

60 ns

Yes

CMOS

38535Q/M;38534H;883B

36

PAL-TYPE

5

5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

Macrocell

240

1.27 mm

125 °C (257 °F)

-55 °C (-67 °F)

Quad

S-XQCC-J44

No

16.7 MHz

24

EPB1400J

Altera

UV PLD

J Bend

44

WQCCJ

Square

Ceramic, Glass-Sealed

Yes

CMOS

Chip Carrier, Window

Macrocell

1.27 mm

4 Dedicated Inputs, 20 I/O

4

Quad

S-GQCC-J44

4.57 mm

16.51 mm

No

20 Macrocells

16.51 mm

20

EPM5064LC44-2

Altera

OT PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

45 ns

Yes

5.25 V

64

CMOS

5

5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

7 Dedicated Inputs, 28 I/O

7

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J44

4.57 mm

16.5862 mm

No

64 Macrocells; Shared Input/Clock; Shared Product Terms

e0

40 MHz

220 °C (428 °F)

16.5862 mm

No

28

EPM7032LI44-3

Altera

EE PLD

Industrial

J Bend

44

QCCJ

Square

Plastic/Epoxy

15 ns

Yes

5.5 V

32

CMOS

5

5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

No

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

0 Dedicated Inputs, 36 I/O

0

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J44

4.572 mm

16.5862 mm

No

e0

220 °C (428 °F)

16.5862 mm

No

36

EPM7064LC44-12

Altera

EE PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

12 ns

Yes

5.25 V

64

CMOS

5

5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 36 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J44

1

4.572 mm

16.5862 mm

No

Labs interconnected by PIA; 4 Labs; 64 Macrocells; 1 External Clock; Shared Input/Clock

e0

125 MHz

20 s

220 °C (428 °F)

16.5862 mm

No

36

EPM5032LI-15

Altera

OT PLD

Industrial

J Bend

28

QCCJ

Square

Plastic/Epoxy

15 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

85 °C (185 °F)

7 Dedicated Inputs, 16 I/O

7

-40 °C (-40 °F)

Quad

S-PQCC-J28

No

83.3 MHz

16

EPM5064ALC-15

Altera

OT PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

25 ns

Yes

5.25 V

CMOS

5

Chip Carrier

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

7 Dedicated Inputs, 28 I/O

7

0 °C (32 °F)

Quad

S-PQCC-J44

4.57 mm

16.5862 mm

No

Labs interconnected by PIA; 4 Labs; 64 Macrocells; 1 External Clock; Shared Input/Clock

83.3 MHz

16.5862 mm

28

EPM7064LC68-10

Altera

EE PLD

Commercial

J Bend

68

QCCJ

Square

Plastic/Epoxy

10 ns

Yes

5.25 V

64

CMOS

5

3.3/5,5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 52 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J68

2

5.08 mm

24.2316 mm

No

Configurable I/O operation with 3.3 V or 5 V

e0

125 MHz

20 s

220 °C (428 °F)

24.2316 mm

No

52

EP1210JM-1

Altera

UV PLD

Military

J Bend

44

WQCCJ

Square

Ceramic, Glass-Sealed

50 ns

Yes

5.5 V

CMOS

5

Chip Carrier, Window

Macrocell

4.5 V

1.27 mm

125 °C (257 °F)

12 Dedicated Inputs, 24 I/O

12

-55 °C (-67 °F)

Quad

S-GQCC-J44

4.57 mm

16.51 mm

No

28 Macrocells

28.5 MHz

16.51 mm

24

EP1810JM68-45

Altera

UV PLD

Military

J Bend

68

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

50 ns

Yes

5.5 V

CMOS

5

Chip Carrier, Window

Macrocell

4.5 V

1.27 mm

125 °C (257 °F)

12 Dedicated Inputs, 48 I/O

12

-55 °C (-67 °F)

Quad

S-CQCC-J68

5.08 mm

24.13 mm

No

48 Macrocells; Shared Input/Clock

22.2 MHz

24.13 mm

48

EPF8452LC84-2

Altera

Loadable PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

336

Yes

5.25 V

CMOS

68

5

3.3/5,5 V

Chip Carrier

LDCC84,1.2SQ

Field Programmable Gate Arrays

Registered

4.75 V

1.27 mm

70 °C (158 °F)

4 Dedicated Inputs, 64 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

452 Flip Flops; 336 Logic elements; Configurable I/O operation with 3.3 V or 5 V

e0

64

220 °C (428 °F)

29.3116 mm

64

EPS448JC-20

Altera

UV PLD

Commercial

J Bend

28

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

Yes

5.25 V

CMOS

5

Chip Carrier, Window

Registered

4.75 V

1.27 mm

70 °C (158 °F)

8 Dedicated Inputs, 0 I/O

8

0 °C (32 °F)

Tin Lead

Quad

S-CQCC-J28

4.826 mm

11.43 mm

No

Stand-Alone Microsequencer

e0

20 MHz

220 °C (428 °F)

11.43 mm

0

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.