J Bend Programmable Logic Devices (PLD) 2,387

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EPM7096SLC68-10	Altera	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V	96	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 48 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz			220 °C (428 °F)	24.23 mm	No	48
EPF8282ALC84-2A	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.25 V		CMOS				5		Chip Carrier				Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	208 Logic Elements					220 °C (428 °F)	29.3116 mm		68
EPX740LI68-12	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	15 ns	40	Yes	5.5 V		CMOS		52		5	5 V	Chip Carrier	LDCC68,1.0SQ	Field Programmable Gate Arrays		Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	10 Dedicated Inputs, 40 I/O	10	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	4 Labs; 40 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	58.8 MHz		52	220 °C (428 °F)	24.23 mm		40
EPM5192LC84-2	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms		40 MHz			220 °C (428 °F)	29.3116 mm		64
EP1810JC-40	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Ceramic	45 ns		Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-XQCC-J68				No		e0				220 °C (428 °F)		No
EPM7128SLC84-6N	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.25 V	128	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e3	166.7 MHz				29.3116 mm	Yes	68
EPM9320ALI84-10N	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10.8 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 60 I/O	0	-40 °C (-40 °F)	Matte Tin	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	320 Macrocells; 20 Labs; 484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e3	144.9 MHz				29.3116 mm		60
EPM5032JI-20	Altera	UV PLD	Industrial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	20 ns		Yes	5.5 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	320	1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 16 I/O	7	-40 °C (-40 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	62.5 MHz		16	220 °C (428 °F)	11.43 mm		16
EPM5032JC-17	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	17 ns		Yes	5.25 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	320	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	71.4 MHz		16	220 °C (428 °F)	11.43 mm		16
EPM7064AELC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V	64	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	64 Macrocells	e0	125 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPM5130ALC-15	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	19 Dedicated Inputs, 48 I/O	19	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		83.3 MHz				29.3116 mm		48
EP600ILI-55	Altera		Industrial	J Bend	28	QCCJ	Square	Plastic	55 ns		Yes			CMOS		20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		160	1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J28				No		e0	18.2 MHz		16	220 °C (428 °F)
EPM7064SLC44-10F	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V	64	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No		e0	125 MHz			220 °C (428 °F)	16.5862 mm	Yes	36
EPF8282LI84-3	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy		208	Yes	5.5 V		CMOS		68		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry	e0			64	220 °C (428 °F)	29.3116 mm		64
EPM7064BLC44-7N	Altera	EE PLD		J Bend	44	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes		64	CMOS					1.8/3.3,2.5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes				1.27 mm					Matte Tin	Quad	S-PQCC-J44	1			No		e3						Yes
EPM5128LC-1	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	40 ns		Yes	5.25 V	128	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz			220 °C (428 °F)		No	52
5962-8946901XA	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	50 ns		Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V			125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J68				No	48 Macrocells; 4 External Clocks; Shared Input/Clock	e0	22.2 MHz						48
EP512JC-30	Altera		Commercial	J Bend	28	QCCJ	Square	Ceramic			Yes			CMOS		22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices				200	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-XQCC-J28				No		e0	30 MHz		12	220 °C (428 °F)
EPM5032LC28-25	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.25 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	320	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.57 mm	11.5062 mm	No	32 Macrocells; Shared Input/Clock; Shared Product Terms	e0	50 MHz		16	220 °C (428 °F)	11.5062 mm		16
5962-01-287-8319	Altera		Industrial	J Bend	44	QCCJ	Square	Ceramic	60 ns		Yes			CMOS		36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell		240	1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)		Quad	S-XQCC-J44				No			16.7 MHz		24
EPM9320ALC84-10N	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10.8 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	320 Macrocells; 20 Labs; 484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e3	144.9 MHz				29.3116 mm		60
EP610ALC28-12	Altera	EE PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	16 Macrocells; 2 External Clocks		83.3 MHz				11.5062 mm		16
EPM7032LI44-15H	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 36 I/O	0	-40 °C (-40 °F)		Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No			100 MHz				16.5862 mm		36
EPM7128ALI84-12	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	3.6 V	128	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells	e0	72.5 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPM7032AELI44-10	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V	32	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 36 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	32 Macrocells	e0	103.1 MHz			220 °C (428 °F)	16.5862 mm	Yes	36
EP910LC44-35	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	38 ns		Yes	5.25 V		CMOS		36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.75 V	240	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	24 Macrocells; 2 External Clocks	e0	37 MHz		24	220 °C (428 °F)	16.5862 mm		24
EPM5130LM-2	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	19 Dedicated Inputs, 48 I/O	19	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz				29.3116 mm		48
EP600JI-3	Altera	UV PLD	Industrial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	45 ns		Yes	5.5 V		CMOS		20	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	160	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	16 Macrocells	e0	26.3 MHz		16	220 °C (428 °F)	11.43 mm		16
EPM7064SLI84-7N	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.5 V	64	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Matte Tin/Copper	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	64 Macrocells	e2	166.7 MHz	40 s		245 °C (473 °F)	29.3116 mm	No	68
EPM7128ELC84-7	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.25 V	128	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	128 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e0	166.7 MHz	20 s		220 °C (428 °F)	29.3116 mm	No	68
EP1830LC-20	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	22 ns		Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		4.572 mm	24.2316 mm	No	48 Macrocells; 4 External Clocks; Shared Input/Clock	e0	50 MHz			220 °C (428 °F)	24.2316 mm	No	48
MPM5128LC-1	Altera	Mask PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	40 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)		Quad	S-PQCC-J68		4.572 mm	24.2316 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		50 MHz			220 °C (428 °F)	24.2316 mm		52
EPM7160LI84-20	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.5 V	160	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 60 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	160 Macrocells; Shared Input/Clock	e0	62.5 MHz			220 °C (428 °F)	29.3116 mm	No	60
EPM7064LI84-6	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.5 V	64	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	64 Macrocells	e0	200 MHz			220 °C (428 °F)	29.3116 mm	No	68
EPM7128ELI84-7	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.5 V	128	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells	e0	166.7 MHz			220 °C (428 °F)	29.3116 mm	No	68
EPF8282ALC84-A-3	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	1.8 ns		Yes	3.6 V		CMOS				3.3		Chip Carrier				Registered	3 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Can also operate at 5 V supply						29.3116 mm		68
EP1810LI68-20	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	22 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No	48 Macrocells; Shared Input/Clock		62.5 MHz				24.2316 mm		48
EP1800JC-3	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	80 ns		Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells	e0	18.5 MHz			220 °C (428 °F)	24.13 mm	No	48
EPM7064SLI44-10	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.5 V	64	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 32 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e0	100 MHz			220 °C (428 °F)	16.5862 mm	No	32
EP910ILC44-25	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)		Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	24 Macrocells; 2 External Clocks		62.5 MHz				16.5862 mm		24
EPM5128LI-1	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	40 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 52 I/O	7	-40 °C (-40 °F)		Quad	S-PQCC-J68		5.08 mm	24.23 mm	No			62.5 MHz				24.23 mm		52
EPM7064AELI84-5	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	3.6 V	64	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	64 Macrocells	e0	250 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPM5032AJC-10	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	10 ns		Yes	5.25 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	320	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	125 MHz		16	220 °C (428 °F)	11.43 mm		16
5962-01-397-0246	Altera		Military	J Bend	28	QCCJ	Square	Ceramic	55 ns		Yes			CMOS	38535Q/M;38534H;883B	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		160	1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J28	1			No		e0	18.2 MHz		16
EPM7064AELI84-4	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	4.5 ns		Yes	3.6 V	64	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 64 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No		e0	250 MHz			220 °C (428 °F)	29.3116 mm	Yes	64
EP900ILC-60	Altera		Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	60 ns		Yes			CMOS		36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell		240	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44				No		e0	16.7 MHz		24	220 °C (428 °F)
EPM7128AELC84-6	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	3.6 V		CMOS				3.3		Chip Carrier				Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No			166.7 MHz				29.3116 mm		68
EPF8282ALI84-2	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy		208	Yes	5.5 V		CMOS		68		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 68 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	208 Logic elements; 26 Labs; Configurable I/O operation with 3.3 V or 5 V	e0			64	220 °C (428 °F)	29.3116 mm		68

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.