J Bend Programmable Logic Devices (PLD) 2,387

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Part RoHS Manufacturer Programmable IC Type Grading Of Temperature Form Of Terminal No. of Terminals Package Code Package Shape Package Body Material Propagation Delay No. of Logic Cells Surface Mount Maximum Supply Voltage No. of Macro Cells Technology Used Screening Level No. of Inputs Architecture Nominal Supply Voltage (V) Packing Method Power Supplies (V) Package Style (Meter) Package Equivalence Code Sub-Category In-System Programmable Output Function Minimum Supply Voltage No. of Product Terms Pitch Of Terminal Maximum Operating Temperature Organization No. of Dedicated Inputs Minimum Operating Temperature Finishing Of Terminal Used Position Of Terminal JESD-30 Code Moisture Sensitivity Level (MSL) Maximum Seated Height Width Qualification Additional Features JESD-609 Code Maximum Clock Frequency Maximum Time At Peak Reflow Temperature (s) No. of Outputs Peak Reflow Temperature (C) Length JTAG Boundary Scan Test No. of I/O Lines

EPM7064AELC44-5

Altera

EE PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

5 ns

Yes

3.6 V

64

CMOS

3.3

2.5/3.3,3.3 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

Yes

Macrocell

3 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 36 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J44

4.57 mm

16.5862 mm

No

64 Macrocells

e0

250 MHz

220 °C (428 °F)

16.5862 mm

Yes

36

EPM7032LI44-10

Altera

EE PLD

Industrial

J Bend

44

QCCJ

Square

Plastic/Epoxy

10 ns

Yes

5.5 V

32

CMOS

5

5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

No

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

0 Dedicated Inputs, 32 I/O

0

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J44

4.57 mm

16.5862 mm

No

e0

100 MHz

220 °C (428 °F)

16.5862 mm

No

32

EPM7032VLC44-4

Altera

EE PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

20 ns

Yes

5.25 V

32

CMOS

5

3.3 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 36 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J44

4.572 mm

16.5862 mm

No

e0

220 °C (428 °F)

16.5862 mm

No

36

MPM5128LC-2

Altera

Mask PLD

Commercial

J Bend

68

QCCJ

Square

Plastic/Epoxy

45 ns

Yes

5.25 V

CMOS

5

Chip Carrier

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

7 Dedicated Inputs, 52 I/O

7

0 °C (32 °F)

Quad

S-PQCC-J68

4.572 mm

24.2316 mm

No

Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock

40 MHz

220 °C (428 °F)

24.2316 mm

52

EPM7160SLC84-7

Altera

EE PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

7.5 ns

Yes

5.25 V

160

CMOS

5

3.3/5,5 V

Chip Carrier

LDCC84,1.2SQ

Programmable Logic Devices

Yes

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 64 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J84

2

5.08 mm

29.3116 mm

No

Configurable I/O operation with 3.3 V or 5 V

e0

166.7 MHz

20 s

220 °C (428 °F)

29.3116 mm

Yes

64

EPM7032VLI44-15

Altera

EE PLD

Industrial

J Bend

44

QCCJ

Square

Plastic/Epoxy

15 ns

Yes

3.6 V

CMOS

3.3

Chip Carrier

Macrocell

3 V

1.27 mm

85 °C (185 °F)

0 Dedicated Inputs, 36 I/O

0

-40 °C (-40 °F)

Quad

S-PQCC-J44

4.57 mm

16.5862 mm

No

32 Macrocells

100 MHz

16.5862 mm

36

EPM7096SLI84-10

Altera

EE PLD

Industrial

J Bend

84

QCCJ

Square

Plastic/Epoxy

10 ns

Yes

5.5 V

96

CMOS

5

3.3/5,5 V

Chip Carrier

LDCC84,1.2SQ

Programmable Logic Devices

Yes

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

0 Dedicated Inputs, 60 I/O

0

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

Configurable I/O operation with 3.3 V or 5 V

e0

100 MHz

220 °C (428 °F)

29.3116 mm

No

60

EPM7128AELC84-7

Altera

EE PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

7.5 ns

Yes

3.6 V

128

CMOS

3.3

2.5/3.3,3.3 V

Chip Carrier

LDCC84,1.2SQ

Programmable Logic Devices

Yes

Macrocell

3 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 68 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J84

2

5.08 mm

29.3116 mm

No

e0

129.9 MHz

20 s

220 °C (428 °F)

29.3116 mm

Yes

68

EP1810LI68-45

Altera

OT PLD

Industrial

J Bend

68

QCCJ

Square

Plastic/Epoxy

50 ns

Yes

5.5 V

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 48 I/O

12

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J68

5.08 mm

24.2316 mm

No

48 Macrocells; Shared Input/Clock

e0

33.3 MHz

220 °C (428 °F)

24.2316 mm

No

48

EP900LI

Altera

OT PLD

Industrial

J Bend

44

QCCJ

Square

Plastic/Epoxy

60 ns

Yes

5.5 V

CMOS

36

PAL-TYPE

5

5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

Macrocell

4.5 V

240

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J44

16.6116 mm

No

24 Macrocells

e0

20 MHz

24

220 °C (428 °F)

16.6116 mm

24

EPM5064LI44-2

Altera

OT PLD

Industrial

J Bend

44

QCCJ

Square

Plastic/Epoxy

45 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

7 Dedicated Inputs, 28 I/O

7

-40 °C (-40 °F)

Quad

S-PQCC-J44

4.57 mm

16.5862 mm

No

64 Macrocells; 4 Labs

50 MHz

16.5862 mm

28

EP1810JC68-35

Altera

UV PLD

Commercial

J Bend

68

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

40 ns

Yes

5.25 V

CMOS

5

Chip Carrier, Window

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

12 Dedicated Inputs, 48 I/O

12

0 °C (32 °F)

Quad

S-CQCC-J68

5.08 mm

24.13 mm

No

48 Macrocells; Shared Input/Clock

28.6 MHz

24.13 mm

48

EP1800LI-2

Altera

OT PLD

Industrial

J Bend

68

QCCJ

Square

Plastic/Epoxy

70 ns

Yes

5.5 V

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 48 I/O

12

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J68

24.2316 mm

No

48 Macrocells

e0

20.8 MHz

220 °C (428 °F)

24.2316 mm

No

48

EP1800LI

Altera

OT PLD

Industrial

J Bend

68

QCCJ

Square

Plastic

90 ns

Yes

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

1.27 mm

85 °C (185 °F)

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J68

No

e0

220 °C (428 °F)

No

EP1810LC68-35

Altera

OT PLD

Commercial

J Bend

68

QCCJ

Square

Plastic/Epoxy

40 ns

Yes

5.25 V

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

12 Dedicated Inputs, 48 I/O

12

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J68

5.08 mm

24.2316 mm

No

48 Macrocells; Shared Input/Clock

e0

40 MHz

220 °C (428 °F)

24.2316 mm

No

48

EP1810JC68-25

Altera

UV PLD

Commercial

J Bend

68

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

28 ns

Yes

5.25 V

CMOS

5

Chip Carrier, Window

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

12 Dedicated Inputs, 48 I/O

12

0 °C (32 °F)

Quad

S-CQCC-J68

5.08 mm

24.13 mm

No

48 Macrocells; Shared Input/Clock

40 MHz

24.13 mm

48

EP910LC-30T

Altera

OT PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

33 ns

Yes

5.25 V

CMOS

36

PAL-TYPE

5

5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

Macrocell

4.75 V

240

1.27 mm

70 °C (158 °F)

12 Dedicated Inputs, 24 I/O

12

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J44

4.57 mm

16.5862 mm

No

Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks

e0

33.3 MHz

24

220 °C (428 °F)

16.5862 mm

24

EPM7064SLI44-5N

Altera

EE PLD

Industrial

J Bend

44

QCCJ

Square

Plastic/Epoxy

5 ns

Yes

64

CMOS

5

5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

Yes

1.27 mm

85 °C (185 °F)

-40 °C (-40 °F)

Quad

S-PQCC-J44

No

No

EP1800JI-2

Altera

UV PLD

Industrial

J Bend

68

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

70 ns

Yes

5.5 V

48

CMOS

5

5 V

Chip Carrier, Window

LDCC68,1.0SQ

Programmable Logic Devices

No

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 48 I/O

12

-40 °C (-40 °F)

Tin Lead

Quad

S-CQCC-J68

5.08 mm

24.13 mm

No

48 Macrocells

e0

20.8 MHz

220 °C (428 °F)

24.13 mm

No

48

EPM7096JC84

Altera

EE PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

25 ns

Yes

5.25 V

96

CMOS

5

5 V

Chip Carrier

LDCC84,1.2SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 64 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

e0

220 °C (428 °F)

29.3116 mm

No

64

EPM7064SLC44-5

Altera

EE PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

5 ns

Yes

5.25 V

64

CMOS

5

5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

Yes

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 36 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J44

1

4.572 mm

16.5862 mm

No

64 Macrocells; 4 Labs; Configurable I/O operation with 3.3 V or 5 V

e0

250 MHz

20 s

220 °C (428 °F)

16.5862 mm

Yes

36

EPM5130LI84-1

Altera

OT PLD

Industrial

J Bend

84

QCCJ

Square

Plastic/Epoxy

40 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

19 Dedicated Inputs, 36 I/O

19

-40 °C (-40 °F)

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

128 Macrocells; 8 Labs

62.5 MHz

29.3116 mm

36

EPM5016LC-15

Altera

OT PLD

Commercial

J Bend

20

QCCJ

Square

Plastic/Epoxy

15 ns

Yes

5.25 V

CMOS

16

PAL-TYPE

5

5 V

Chip Carrier

LDCC20,.4SQ

Programmable Logic Devices

Macrocell

4.75 V

160

1.27 mm

70 °C (158 °F)

7 Dedicated Inputs, 8 I/O

7

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J20

4.572 mm

9.017 mm

No

Macrocells interconnected by PIA; 16 Macrocells; 1 External Clock; Shared Input/Clock

e0

100 MHz

8

220 °C (428 °F)

9.017 mm

8

EP610ALC28-7

Altera

EE PLD

Commercial

J Bend

28

QCCJ

Square

Plastic/Epoxy

7.5 ns

Yes

5.25 V

CMOS

5

Chip Carrier

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

4 Dedicated Inputs, 16 I/O

4

0 °C (32 °F)

Quad

S-PQCC-J28

4.572 mm

11.5062 mm

No

16 Macrocells; 2 External Clocks

125 MHz

11.5062 mm

16

EP910LM-40

Altera

OT PLD

Military

J Bend

44

QCCJ

Square

Plastic/Epoxy

43 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

125 °C (257 °F)

12 Dedicated Inputs, 24 I/O

12

-55 °C (-67 °F)

Quad

S-PQCC-J44

4.572 mm

16.5862 mm

No

Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks

25 MHz

16.5862 mm

24

EPF8452ALM84-3

Altera

Loadable PLD

Military

J Bend

84

QCCJ

Square

Plastic/Epoxy

Yes

5.5 V

CMOS

5

Chip Carrier

Registered

4.5 V

1.27 mm

125 °C (257 °F)

4 Dedicated Inputs, 64 I/O

4

-55 °C (-67 °F)

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

452 Flip Flops; 336 Logic Elements

29.3116 mm

64

EP1810LI-35

Altera

OT PLD

Industrial

J Bend

68

QCCJ

Square

Plastic/Epoxy

35 ns

Yes

5.5 V

5

Chip Carrier

Macrocell

4.5 V

85 °C (185 °F)

15 Dedicated Inputs, 45 I/O

15

-40 °C (-40 °F)

Quad

S-PQCC-J68

No

40 MHz

45

EPM7128ALC84-6N

Altera

EE PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

6 ns

Yes

3.6 V

CMOS

3.3

Chip Carrier

Macrocell

3 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 68 I/O

0

0 °C (32 °F)

Matte Tin

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

128 Macrocells; 8 Labs; Configurable I/O operation with 2.5 V or 3.3 V

e3

144.9 MHz

29.3116 mm

68

5962-01-302-7053

Altera

Military

J Bend

28

QCCJ

Square

Ceramic

55 ns

Yes

CMOS

38535Q/M;38534H;883B

20

PAL-TYPE

5

5 V

Chip Carrier

LDCC28,.5SQ

Programmable Logic Devices

Macrocell

160

1.27 mm

125 °C (257 °F)

-55 °C (-67 °F)

Tin Lead

Quad

S-XQCC-J28

1

No

e0

18.2 MHz

16

EP610JM883BX

Altera

Military

J Bend

28

QCCJ

Square

Ceramic

37 ns

Yes

CMOS

38535Q/M;38534H;883B

20

PAL-TYPE

5

5 V

Chip Carrier

LDCC28,.5SQ

Programmable Logic Devices

Macrocell

160

1.27 mm

125 °C (257 °F)

-55 °C (-67 °F)

Tin Lead

Quad

S-XQCC-J28

No

e0

28.6 MHz

16

220 °C (428 °F)

EP1800JC

Altera

UV PLD

Commercial

J Bend

68

QCCJ

Square

Ceramic

90 ns

Yes

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

1.27 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Quad

S-XQCC-J68

No

e0

220 °C (428 °F)

No

EPM7064AELC84-7

Altera

EE PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

7.5 ns

Yes

3.6 V

64

CMOS

3.3

2.5/3.3,3.3 V

Chip Carrier

LDCC84,1.2SQ

Programmable Logic Devices

Yes

Macrocell

3 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 68 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

64 Macrocells

e0

166.7 MHz

220 °C (428 °F)

29.3116 mm

Yes

68

EPM5128ALM68-15

Altera

OT PLD

Military

J Bend

68

QCCJ

Square

Plastic/Epoxy

25 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

125 °C (257 °F)

7 Dedicated Inputs, 52 I/O

7

-55 °C (-67 °F)

Quad

S-PQCC-J68

5.08 mm

24.2316 mm

No

Labs interconnected by PIA; 8 Labs; 1 External Clock

83.3 MHz

24.2316 mm

52

EPM7032VLC44-3

Altera

EE PLD

Industrial

J Bend

44

QCCJ

Square

Plastic/Epoxy

15 ns

Yes

32

CMOS

3.3

3.3 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

No

1.27 mm

85 °C (185 °F)

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J44

No

e0

220 °C (428 °F)

No

EP22V10ELC-10

Altera

OT PLD

Commercial

J Bend

28

QCCJ

Square

Plastic/Epoxy

10 ns

Yes

5.25 V

CMOS

22

PAL-TYPE

5

5 V

Chip Carrier

LDCC28,.5SQ

Programmable Logic Devices

Macrocell

4.75 V

132

1.27 mm

70 °C (158 °F)

11 Dedicated Inputs, 10 I/O

11

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J28

4.57 mm

11.505 mm

No

Macrocells Interconnected By Global Bus; 10 Macrocells; 1 External Clock

e0

95.2 MHz

10

220 °C (428 °F)

11.505 mm

10

EPF10K10LC84-4N

Altera

Loadable PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

0.6 ns

576

Yes

5.25 V

CMOS

59

5

3.3/5 V

Chip Carrier

LDCC84,1.2SQ

Field Programmable Gate Arrays

Registered

4.75 V

1.27 mm

70 °C (158 °F)

4 Dedicated Inputs, 59 I/O

4

0 °C (32 °F)

Matte Tin

Quad

S-PQCC-J84

3

5.08 mm

29.3116 mm

No

576 Logic Elements

e3

67.11 MHz

30 s

59

245 °C (473 °F)

29.3116 mm

59

EP610JM883BX-35

Altera

UV PLD

Military

J Bend

28

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

37 ns

Yes

5.5 V

CMOS

5

Chip Carrier, Window

Macrocell

4.5 V

1.27 mm

125 °C (257 °F)

4 Dedicated Inputs, 16 I/O

4

-55 °C (-67 °F)

Quad

S-CQCC-J28

4.826 mm

11.43 mm

No

Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks

28.6 MHz

11.43 mm

16

EP512LC-25

Altera

Commercial

J Bend

28

QCCJ

Square

Plastic/Epoxy

Yes

CMOS

22

PAL-TYPE

5

5 V

Chip Carrier

LDCC28,.5SQ

Programmable Logic Devices

200

1.27 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J28

No

e0

33 MHz

12

220 °C (428 °F)

EP1210JI

Altera

UV PLD

Industrial

J Bend

44

WQCCJ

Square

Ceramic, Glass-Sealed

90 ns

Yes

5.5 V

CMOS

36

PAL-TYPE

5

Chip Carrier, Window

LDCC44,.7SQ

Programmable Logic Devices

Macrocell

4.5 V

236

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Quad

S-GQCC-J44

4.57 mm

16.51 mm

No

28 Macrocells

e0

17.5 MHz

24

220 °C (428 °F)

16.51 mm

24

EPM7096LI68-7

Altera

EE PLD

Industrial

J Bend

68

QCCJ

Square

Plastic/Epoxy

7.5 ns

Yes

5.5 V

96

CMOS

5

3.3/5,5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

0 Dedicated Inputs, 52 I/O

0

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J68

5.08 mm

24.23 mm

No

96 Macrocells

e0

166.7 MHz

220 °C (428 °F)

24.23 mm

No

52

EPM5064LC-1

Altera

OT PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

40 ns

Yes

5.25 V

64

CMOS

5

5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

7 Dedicated Inputs, 28 I/O

7

0 °C (32 °F)

Tin/Lead

Quad

S-PQCC-J44

No

Labs interconnected by PIA; 4 Labs; 64 Macrocells; 1 External Clock; Shared Input/Clock

e0

50 MHz

30 s

220 °C (428 °F)

No

28

EP910JI44-40

Altera

UV PLD

Industrial

J Bend

44

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

43 ns

Yes

5.5 V

CMOS

5

Chip Carrier, Window

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Quad

S-CQCC-J44

4.57 mm

16.51 mm

No

24 Macrocells; 2 External Clocks

25 MHz

16.51 mm

24

EPM5128AJM68-12

Altera

UV PLD

Military

J Bend

68

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

20 ns

Yes

5.5 V

CMOS

5

Chip Carrier, Window

Macrocell

4.5 V

1.27 mm

125 °C (257 °F)

7 Dedicated Inputs, 52 I/O

7

-55 °C (-67 °F)

Quad

S-CQCC-J68

5.08 mm

24.13 mm

No

Labs interconnected by PIA; 8 Labs; 1 External Clock

111.1 MHz

24.13 mm

52

EPF8452ALM84-6

Altera

Loadable PLD

Military

J Bend

84

QCCJ

Square

Plastic/Epoxy

Yes

5.5 V

CMOS

5

Chip Carrier

Registered

4.5 V

1.27 mm

125 °C (257 °F)

4 Dedicated Inputs, 64 I/O

4

-55 °C (-67 °F)

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

452 Flip Flops; 336 Logic Elements

29.3116 mm

64

EPM7064LI84-7

Altera

EE PLD

Industrial

J Bend

84

QCCJ

Square

Plastic/Epoxy

7.5 ns

Yes

5.5 V

64

CMOS

5

3.3/5,5 V

Chip Carrier

LDCC84,1.2SQ

Programmable Logic Devices

No

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

0 Dedicated Inputs, 68 I/O

0

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

64 Macrocells

e0

166.7 MHz

220 °C (428 °F)

29.3116 mm

No

68

EPM7064BLC44

Altera

EE PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

3.5 ns

Yes

CMOS

2.5

Chip Carrier

Macrocell

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 36 I/O

0

0 °C (32 °F)

Quad

S-PQCC-J44

4.57 mm

16.5862 mm

No

16.5862 mm

36

EPF8636ALC84-3

Altera

Loadable PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

504

Yes

5.25 V

CMOS

68

5

5 V

Chip Carrier

LDCC84,1.2SQ

Field Programmable Gate Arrays

Registered

4.75 V

1.27 mm

70 °C (158 °F)

4 Dedicated Inputs, 68 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J84

3

5.08 mm

29.3116 mm

No

504 Logic Elements

e0

385 MHz

20 s

64

220 °C (428 °F)

29.3116 mm

68

EPF8282ALI84-A-2

Altera

Loadable PLD

Industrial

J Bend

84

QCCJ

Square

Plastic/Epoxy

1.7 ns

Yes

3.6 V

CMOS

3.3

Chip Carrier

Registered

3 V

1.27 mm

85 °C (185 °F)

4 Dedicated Inputs, 68 I/O

4

-40 °C (-40 °F)

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

Can also operate at 5 V supply

29.3116 mm

68

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.