J Bend Programmable Logic Devices (PLD) 2,387

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EPF10K10LC84-3N	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	0.5 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Registered	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 59 I/O	4	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	576 Logic Elements	e3	71.43 MHz				29.3116 mm		59
5962-01-357-5595	Altera		Military	J Bend	44	QCCJ	Square	Ceramic	60 ns		Yes			CMOS	38535Q/M;38534H;883B	36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell		240	1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)		Quad	S-XQCC-J44				No			16.7 MHz		24
EP1810LC-25	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	28 ns		Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	40 MHz			220 °C (428 °F)		No	48
EPM5064JI-2	Altera	UV PLD	Industrial	J Bend	44	QCCJ	Square	Ceramic	30 ns		Yes		64	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No				1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Quad	S-XQCC-J44				No		e0				220 °C (428 °F)		No
MPM5064LC-2	Altera	Mask PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 28 I/O	7	0 °C (32 °F)		Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No	Labs interconnected by PIA; 4 Labs; 64 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz			220 °C (428 °F)	16.5862 mm		28
EP1800JMB	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	90 ns		Yes	5.5 V	48	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells	e0				220 °C (428 °F)	24.13 mm	No	48
EPF8636ALI84-4	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy		504	Yes	5.5 V		CMOS		68		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0		20 s	64	220 °C (428 °F)	29.3116 mm		64
EPM9320LC84-20N	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	23 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e3	100 MHz				29.3116 mm		60
EP1810LC-20	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	22 ns		Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	50 MHz			220 °C (428 °F)		No	48
EPM5016LC-17	Altera	OT PLD	Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy	17 ns		Yes	5.25 V		CMOS		16	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 8 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20		4.572 mm	9.017 mm	No	Macrocells interconnected by PIA; 16 Macrocells; 1 External Clock; Shared Input/Clock	e0	83.3 MHz		8	220 °C (428 °F)	9.017 mm		8
EPM5192JM	Altera	UV PLD	Military	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns		Yes	5.5 V	192	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz			220 °C (428 °F)	29.21 mm	No	64
EPM5130LI-2	Altera	OT PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.5 V	128	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	19 Dedicated Inputs, 48 I/O	19	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84				No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz			220 °C (428 °F)		No	48
EP1800ILC-75	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic	75 ns		Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No		e0				220 °C (428 °F)		No
EPM5032LC-25	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.25 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	320	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.57 mm	11.5062 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	62.5 MHz		16	220 °C (428 °F)	11.5062 mm		16
EPF8452LM84-3	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs With Fasttrack Interconnect; 452 Flip Flops; 336 Logic Elements						29.3116 mm		64
EPS448LM28-20	Altera	OT PLD	Military	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	125 °C (257 °F)	8 Dedicated Inputs, 0 I/O	8	-55 °C (-67 °F)		Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	PLS		20 MHz				11.5062 mm		0
EPM7032SLI44-15	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V	32	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 32 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e0	76.9 MHz			220 °C (428 °F)	16.5862 mm	No	32
EPM3032ALI44-10	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V	32	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 34 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44	1	4.572 mm	16.5862 mm	No		e0	103.1 MHz			220 °C (428 °F)	16.5862 mm	Yes	34
EPM7128AELC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V	128	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No		e0	98 MHz	20 s		220 °C (428 °F)	29.3116 mm	Yes	68
EP1830JC-25	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Ceramic	28 ns		Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-XQCC-J68				No		e0				220 °C (428 °F)		No
EPM7128ALC84-5	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	3.6 V	128	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells; 8 Labs; Configurable I/O operation with 2.5 V or 3.3 V	e0	250 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPM5192LC84	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.25 V	192	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms	e0	33.3 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM5032JI28-25	Altera	UV PLD	Industrial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns		Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 16 I/O	7	-40 °C (-40 °F)		Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	32 Macrocells; Shared Input/Clock; Shared Product Terms		50 MHz				11.43 mm		16
EPM5032AJC-12	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	12 ns		Yes	5.25 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	320	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	111.1 MHz		16	220 °C (428 °F)	11.43 mm		16
EPM9400LC84-12	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	13 ns		Yes	5.25 V	400	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 59 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	580 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz			220 °C (428 °F)	29.3116 mm	Yes	59
EPM5130LM84	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	19 Dedicated Inputs, 48 I/O	19	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz				29.3116 mm		48
EPM7032LI44-12	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.5 V	32	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 36 I/O	0	-40 °C (-40 °F)	Tin/Lead	Quad	S-PQCC-J44	1	4.572 mm	16.5862 mm	No	Labs interconnected by PIA; 2 Labs; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	125 MHz	20 s		220 °C (428 °F)	16.5862 mm	No	36
EPM7064BLC44-7	Altera	EE PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	2.625 V	64	CMOS				2.5	1.8/3.3,2.5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	2.375 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 36 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e0	142.9 MHz			220 °C (428 °F)	16.5862 mm	Yes	36
EPM5130AJC-15	Altera	UV PLD	Commercial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns		Yes	5.25 V		CMOS				5		Chip Carrier, Window				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	19 Dedicated Inputs, 48 I/O	19	0 °C (32 °F)		Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		83.3 MHz				29.21 mm		48
EPM7064SLI84-15	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V	64	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 64 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	76.9 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM5128AJM68-20	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	33 ns		Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		66.7 MHz				24.13 mm		52
5962-01-381-7464	Altera		Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	60 ns		Yes			CMOS		36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell		240	1.27 mm	70 °C (158 °F)			0 °C (32 °F)		Quad	S-PQCC-J44				No			16.7 MHz		24
EPM5128LM68	Altera	OT PLD	Military	J Bend	68	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz				24.2316 mm		52
EPS448JC-30	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired			Yes	5.25 V		CMOS				5		Chip Carrier, Window				Registered	4.75 V		1.27 mm	70 °C (158 °F)	8 Dedicated Inputs, 0 I/O	8	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.826 mm	11.43 mm	No	Stand-Alone Microsequencer	e0	30 MHz			220 °C (428 °F)	11.43 mm		0
EPX740LC68-12	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	15 ns	40	Yes	5.25 V		CMOS		52		5	5 V	Chip Carrier	LDCC68,1.0SQ	Field Programmable Gate Arrays		Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	10 Dedicated Inputs, 40 I/O	10	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	4 Labs; 40 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	58.8 MHz		52	220 °C (428 °F)	24.23 mm		40
EPM5032LC-1	Altera		Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	15 ns		Yes			CMOS		24	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices				320	1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28				No		e0	83.3 MHz		16	220 °C (428 °F)
EPM3032ALI44-7	Altera	EE PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	3.6 V	32	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 34 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No		e0	138.9 MHz			220 °C (428 °F)	16.5862 mm	Yes	34
EPX740LC68-10	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	12 ns	40	Yes	5.25 V		CMOS		52		5	5 V	Chip Carrier	LDCC68,1.0SQ	Field Programmable Gate Arrays		Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	10 Dedicated Inputs, 40 I/O	10	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	4 Labs; 40 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	71.4 MHz		52	220 °C (428 °F)	24.23 mm		40
EPM7064SLI84-6	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.5 V	64	CMOS				5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	64 Macrocells	e0	200 MHz			220 °C (428 °F)	29.3116 mm	No	68
EP610LC28-15T	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	17 ns		Yes	5.25 V		CMOS				5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	16 Macrocells; 2 External Clocks		71.4 MHz				11.5062 mm		16
EPM5130JC-2	Altera	UV PLD	Commercial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	45 ns		Yes	5.25 V	128	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	19 Dedicated Inputs, 48 I/O	19	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz			220 °C (428 °F)	29.21 mm	No	48
EP1830LC-25	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	28 ns		Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		4.572 mm	24.2316 mm	No	48 Macrocells; 4 External Clocks; Shared Input/Clock	e0	40 MHz			220 °C (428 °F)	24.2316 mm	No	48
EP1800JM-3	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired			Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells		18.5 MHz				24.13 mm		48
EPM7064SLI84-10N	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes		64	CMOS					3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes				1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)		Quad	S-PQCC-J84				No								No
EP900LC	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	60 ns		Yes	5.25 V		CMOS		36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.75 V	240	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44			16.6116 mm	No	24 Macrocells	e0	20 MHz		24	220 °C (428 °F)	16.6116 mm		24
EPM7128AELC84-7N	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	3.6 V		CMOS				3.3		Chip Carrier				Macrocell	3 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No		e3	129.9 MHz				29.3116 mm		68
EPM7128ALI84-5	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	3.6 V	128	CMOS				3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells; 8 Labs; Configurable I/O operation with 2.5 V or 3.3 V	e0	250 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EP1800JC-2	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	70 ns		Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells	e0	20.8 MHz			220 °C (428 °F)	24.13 mm	No	48

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.