Through-Hole Field Programmable Gate Arrays (FPGA) 16

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of CLBs	Technology Used	Screening Level	No. of Inputs	No. of Equivalent Gates	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	Minimum Supply Voltage	Pitch Of Terminal	Maximum Operating Temperature	Maximum Combinatorial Delay of a CLB	Organization	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	No. of Outputs	Peak Reflow Temperature (C)	Length
M38510/60504BQX	Texas Instruments	FPGA	Military	Through-Hole	40	DIP	Rectangular	Ceramic, Metal-Sealed Cofired		No	5.5 V		CMOS			4000	5		In-Line			4.5 V		125 °C (257 °F)		4000 Gates	-55 °C (-67 °F)		Dual	R-CDIP-T40				No
5962-9461701MPX	Xilinx	FPGA	Military	Through-Hole	8	DIP	Rectangular	Ceramic, Glass-Sealed		No				MIL-STD-883					In-Line				2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)		Dual	R-GDIP-T8		4.318 mm	7.62 mm	No						9.906 mm
XC2064-70PD48C	Xilinx	FPGA	Commercial	Through-Hole	48	DIP	Rectangular	Plastic	64	No			CMOS		40		5	5 V	In-Line	DIP48,.6	Field Programmable Gate Arrays		2.54 mm	70 °C (158 °F)			0 °C (32 °F)		Dual	R-PDIP-T48				No			70 MHz	40
XC2064-50PD48C	Xilinx	FPGA	Commercial	Through-Hole	48	DIP	Rectangular	Plastic/Epoxy	64	No	5.25 V	64	CMOS		40	600	5	5 V	In-Line	DIP48,.6	Field Programmable Gate Arrays	4.75 V	2.54 mm	70 °C (158 °F)	15 ns	64 CLBS, 600 Gates	0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T48	1	4.826 mm	15.24 mm	No	MAX 58 I/OS; 122 flip-flops; typical gates = 600 - 1000	e0	50 MHz	40		61.7855 mm
XC2064-33PD48C	Xilinx	FPGA	Commercial	Through-Hole	48	DIP	Rectangular	Plastic/Epoxy	64	No			CMOS		40		5	5 V	In-Line	DIP48,.6	Field Programmable Gate Arrays		2.54 mm	70 °C (158 °F)			0 °C (32 °F)		Dual	R-PDIP-T48				No			33 MHz	40
XC2064-33CD48M	Xilinx	FPGA	Military	Through-Hole	48	DIP	Rectangular	Ceramic	64	No			CMOS		40		5	5 V	In-Line	DIP48,.6	Field Programmable Gate Arrays		2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)		Dual	R-XDIP-T48				No			33 MHz	40
XC2064-33CD48I	Xilinx	FPGA	Industrial	Through-Hole	48	DIP	Rectangular	Ceramic	64	No			CMOS		40		5	5 V	In-Line	DIP48,.6	Field Programmable Gate Arrays		2.54 mm	85 °C (185 °F)			-40 °C (-40 °F)		Dual	R-XDIP-T48				No			33 MHz	40
XC2064-50CD48I	Xilinx	FPGA	Industrial	Through-Hole	48	DIP	Rectangular	Ceramic, Metal-Sealed Cofired	64	No	5.5 V	64	CMOS		40	1200	5	5 V	In-Line	DIP48,.6	Field Programmable Gate Arrays	4.5 V	2.54 mm	85 °C (185 °F)	15 ns	64 CLBS, 1200 Gates	-40 °C (-40 °F)	Tin Lead	Dual	R-CDIP-T48	1	9.271 mm	15.24 mm	No	MAX 40 I/OS; 122 flip-flops	e0	50 MHz	40		60.96 mm
5962-9461701MPA	Xilinx	FPGA	Military	Through-Hole	8	DIP	Rectangular	Ceramic, Glass-Sealed		No				MIL-STD-883					In-Line				2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Dual	R-GDIP-T8		4.318 mm	7.62 mm	No		e0				9.906 mm
EPB1400PC	Altera	FPGA	Commercial	Through-Hole	40	DIP	Rectangular	Plastic		No			CMOS						In-Line	DIP40,.6	Field Programmable Gate Arrays		2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T40				No		e0			220 °C (428 °F)
EPB1400DM	Altera	FPGA	Military	Through-Hole	40	DIP	Rectangular	Ceramic		No			CMOS						In-Line	DIP40,.6	Field Programmable Gate Arrays		2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Dual	R-XDIP-T40				No		e0			220 °C (428 °F)
EPB1400PC-2	Altera	FPGA	Commercial	Through-Hole	40	DIP	Rectangular	Plastic/Epoxy		No			CMOS						In-Line	DIP40,.6	Field Programmable Gate Arrays		2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T40				No		e0			220 °C (428 °F)
EPB1400DC	Altera	FPGA	Commercial	Through-Hole	40	DIP	Rectangular	Ceramic		No			CMOS						In-Line	DIP40,.6	Field Programmable Gate Arrays		2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Dual	R-XDIP-T40				No		e0			220 °C (428 °F)
EPB1400PI	Altera	FPGA	Industrial	Through-Hole	40	DIP	Rectangular	Plastic/Epoxy		No			CMOS						In-Line	DIP40,.6	Field Programmable Gate Arrays		2.54 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Dual	R-PDIP-T40				No		e0			220 °C (428 °F)
EPB1400DI	Altera	FPGA	Industrial	Through-Hole	40	DIP	Rectangular	Ceramic		No			CMOS						In-Line	DIP40,.6	Field Programmable Gate Arrays		2.54 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Dual	R-XDIP-T40				No		e0			220 °C (428 °F)
EPB1400DC-2	Altera	FPGA	Commercial	Through-Hole	40	DIP	Rectangular	Ceramic		No			CMOS						In-Line	DIP40,.6	Field Programmable Gate Arrays		2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Dual	R-XDIP-T40				No		e0			220 °C (428 °F)

Field Programmable Gate Arrays (FPGA)

Field Programmable Gate Arrays (FPGAs) are digital integrated circuits that are programmable by the user to perform specific logic functions. They consist of a matrix of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes FPGAs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

FPGAs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the FPGA hardware. The resulting configuration data is then loaded onto the FPGA, allowing it to perform the desired logic functions.

FPGAs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.