Military Programmable Logic Devices (PLD) 1,614

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EPF10K10QM208-4	Altera	Loadable PLD	Military	Gull Wing	208	FQFP	Square	Plastic/Epoxy	23.8 ns		Yes	5.5 V		CMOS				5		Flatpack, Fine Pitch				Registered	4.5 V		.5 mm	125 °C (257 °F)	4 Dedicated Inputs	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G208	4.1 mm	28 mm	No	576 Logic elements Configurable I/O operation with 3.3 V or 5 V	e3	60.6 MHz			28 mm
EPM7256EWM883B208-15	Altera	EE PLD	Military	Gull Wing	208	FQFP	Square	Ceramic, Metal-Sealed Cofired	15 ns		Yes	5.5 V		CMOS				5		Flatpack, Fine Pitch				Macrocell	4.5 V		.5 mm	125 °C (257 °F)	0 Dedicated Inputs, 160 I/O	0	-55 °C (-67 °F)	Matte Tin	Quad	S-CQFP-G208	3.82 mm	27.2 mm	No	256 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e3	76.9 MHz			27.2 mm		160
5962-8946801XC	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns		No		128	CMOS	MIL-STD-883			5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell			2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P68	4.96 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e4	33.3 MHz		220 °C (428 °F)	27.94 mm	No	52
5962-8946801XX	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns		No		128	CMOS	MIL-STD-883			5		Grid Array, Window				Macrocell			2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P68	4.96 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		33.3 MHz			27.94 mm		52
EPM5128GM883B-2	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	45 ns		No		128	CMOS	38535Q/M;38534H;883B			5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell			2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P68	4.96 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz		220 °C (428 °F)	27.94 mm	No	52
EP1210JM-2	Altera	UV PLD	Military	J Bend	44	WQCCJ	Square	Ceramic, Glass-Sealed	65 ns		Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)		Quad	S-GQCC-J44	4.57 mm	16.51 mm	No	28 Macrocells		23.2 MHz			16.51 mm		24
EPF81188ARM240-3	Altera	Loadable PLD	Military	Gull Wing	240	HFQFP	Square	Plastic/Epoxy			Yes	5.5 V		CMOS				5		Flatpack, Heat Sink/Slug, Fine Pitch				Registered	4.5 V		.5 mm	125 °C (257 °F)	4 Dedicated Inputs, 180 I/O	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G240	4.1 mm	32 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3				32 mm		180
EPM7256EGM192-15	Altera	EE PLD	Military	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired	15 ns		No	5.5 V	256	CMOS				5	3.3/5,5 V	Grid Array	PGA192M,17X17	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 160 I/O	0	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P192	5.43 mm	45.15 mm	No	256 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e0	76.9 MHz		220 °C (428 °F)	45.15 mm	No	160
EP610D5962-35	Altera	UV PLD	Military	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	37 ns		No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)		Dual	R-GDIP-T24	5.08 mm	7.62 mm	No			28.5 MHz			32 mm		16
EPM9560RM208-15	Altera	EE PLD	Military	Gull Wing	208	HFQFP	Square	Plastic/Epoxy	15 ns		Yes	5.5 V		CMOS				5		Flatpack, Heat Sink/Slug, Fine Pitch				Macrocell	4.5 V		.5 mm	125 °C (257 °F)	0 Dedicated Inputs, 153 I/O	0	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G208	4.1 mm	28 mm	No	560 Macrocells; 772 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e3	117.6 MHz			28 mm		153
EPM5130JM	Altera	UV PLD	Military	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns		Yes	5.5 V	128	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	19 Dedicated Inputs, 48 I/O	19	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J84	5.08 mm	29.21 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)	29.21 mm	No	48
EPF8820AGM192-4	Altera	Loadable PLD	Military	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS				5		Grid Array				Registered	4.5 V		2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 132 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P192	5.43 mm	45.15 mm	No	820 Flip Flops; 672 Logic elements; Configurable I/O operation with 3.3 V or 5 V					45.15 mm		132
5962-8947601LX	Altera	UV PLD	Military	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	37 ns		No	5.5 V		CMOS	38535Q/M;38534H;883B	20	PAL-TYPE	5	5 V	In-Line, Window	DIP24,.3	Programmable Logic Devices		Macrocell	4.5 V	160	2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Dual	R-GDIP-T24	5.08 mm	7.62 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	28.5 MHz	16	220 °C (428 °F)	32 mm		16
EPF8452AGM160-3	Altera	Loadable PLD	Military	Pin/Peg	160	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS				5		Grid Array				Registered	4.5 V		2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 116 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P160	5.34 mm	39.624 mm	No	452 Flip Flops; 336 Logic Elements					39.624 mm		116
EPF8636AGM192-3	Altera	Loadable PLD	Military	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS				5		Grid Array				Registered	4.5 V		2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 132 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P192	5.43 mm	45.15 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V					45.15 mm		132
5962-01-408-6713	Altera		Military	Through-Hole	24	DIP	Rectangular	Ceramic	55 ns		No			CMOS	38535Q/M;38534H;883B	20	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell		160	2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)		Dual	R-XDIP-T24			No			18.2 MHz	16
EPM5130WM-2	Altera	UV PLD	Military	Gull Wing	100	WQFP	Rectangular	Ceramic, Metal-Sealed Cofired	45 ns		Yes	5.5 V		CMOS				5		Flatpack, Window				Macrocell	4.5 V		.65 mm	125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)	Matte Tin	Quad	R-CQFP-G100	2.99 mm	14 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e3	40 MHz			19.2 mm		64
EP1810GM883B-45	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns		No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)		Perpendicular	S-CPGA-P68	3.81 mm	27.94 mm	No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks		22.2 MHz			27.94 mm		48
EPF81188GM232-3	Altera	Loadable PLD	Military	Pin/Peg	232	PGA	Square	Ceramic, Metal-Sealed Cofired		1008	No	5.5 V		CMOS		184		5	3.3/5,5 V	Grid Array	PGA232,17X17	Field Programmable Gate Arrays		Registered	4.5 V		2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 180 I/O	4	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P232	5.207 mm	44.7 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0		180	220 °C (428 °F)	44.7 mm		180
EP910JM-40	Altera	UV PLD	Military	J Bend	44	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	43 ns		Yes	5.5 V		CMOS		36	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.5 V	240	1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J44	4.826 mm	16.51 mm	No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	25 MHz	24	220 °C (428 °F)	16.51 mm		24
5962-9316801MXC	Altera	EE PLD	Military	Pin/Peg	160	PGA	Square	Ceramic, Metal-Sealed Cofired	20 ns		No	2.625 V	192	CMOS	MIL-STD-883			2.5	3.3/5,5 V	Grid Array	PGA160M,15X15	Programmable Logic Devices	No	Macrocell	2.375 V		2.54 mm	125 °C (257 °F)	0 Dedicated Inputs	0	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P160	5.34 mm	39.624 mm	No	192 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e4	62.5 MHz		220 °C (428 °F)	39.624 mm	No
EPM5130LM	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V	128	CMOS				5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	19 Dedicated Inputs, 48 I/O	19	-55 °C (-67 °F)	Tin Lead	Quad	S-PQCC-J84	5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)	29.3116 mm	No	48
EP910JMB-40	Altera		Military	J Bend	44	QCCJ	Square	Ceramic	43 ns		Yes			CMOS		36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell		240	1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J44					e0	25 MHz	24	220 °C (428 °F)
5962-9324701MYA	Altera	EE PLD	Military	Gull Wing	208	FQFP	Square	Ceramic, Metal-Sealed Cofired	20 ns		Yes	2.625 V		CMOS	MIL-STD-883			2.5		Flatpack, Fine Pitch				Macrocell	2.375 V		.5 mm	125 °C (257 °F)	0 Dedicated Inputs	0	-55 °C (-67 °F)	Tin Lead	Quad	S-CQFP-G208	3.82 mm	27.2 mm	No	256 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e0	62.5 MHz		220 °C (428 °F)	27.2 mm
EPM5130WM883B	Altera	UV PLD	Military	Gull Wing	100	WQFP	Rectangular	Ceramic, Metal-Sealed Cofired	55 ns		Yes	5.5 V	128	CMOS	38535Q/M;38534H;883B			5	5 V	Flatpack, Window	QFP100,.7X.9	Programmable Logic Devices	No	Macrocell	4.5 V		.65 mm	125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)	Tin Lead	Quad	R-CQFP-G100	2.99 mm	14 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)	19.2 mm	No	64
EPM5192LM84	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Quad	S-PQCC-J84	5.08 mm	29.3116 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz			29.3116 mm		64
EPF81188G5962232-3	Altera	Loadable PLD	Military	Pin/Peg	232	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS				5		Grid Array				Registered	4.5 V		2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 180 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P232	5.207 mm	44.7 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V					44.7 mm		180
EPF8820GM192-3	Altera	Loadable PLD	Military	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired		672	No	5.5 V		CMOS		152		5	3.3/5,5 V	Grid Array	PGA192,17X17	Field Programmable Gate Arrays		Registered	4.5 V		2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 148 I/O	4	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P192	5.43 mm	45.15 mm	No	820 Flip Flops; 672 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0		148	220 °C (428 °F)	45.15 mm		148
EP1830GM-30	Altera	OT PLD	Military	Pin/Peg	68	PGA	Square	Ceramic	34 ns		No		48	CMOS				5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No				2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Perpendicular	S-XPGA-P68			No		e0			220 °C (428 °F)		No
EP1810LM-45	Altera	OT PLD	Military	J Bend	68	QCCJ	Square	Plastic/Epoxy	50 ns		Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)		Quad	S-PQCC-J68	5.08 mm	24.23 mm	No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks		22.2 MHz			24.23 mm		48

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.