Military Programmable Logic Devices (PLD) 1,614

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
5962-8946804XC	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	33 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P68		3.81 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e4	66.7 MHz			27.94 mm		52
5962-8946901XA	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	50 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V			125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J68				No	48 Macrocells; 4 External Clocks; Shared Input/Clock	e0	22.2 MHz					48
EPM5032DM883B	Altera	UV PLD	Military	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No			CMOS	38535Q/M;38534H;883B	24	PAL-TYPE	5	5 V	In-Line, Window	DIP28,.3	Programmable Logic Devices		Macrocell		320	2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 16 I/O	7	-55 °C (-67 °F)	Tin Lead	Dual	R-GDIP-T28		5.08 mm	7.62 mm	No		e0	62.5 MHz	16	220 °C (428 °F)	36.83 mm		16
EPM5130LM-2	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	45 ns	Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	19 Dedicated Inputs, 48 I/O	19	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz			29.3116 mm		48
EPM5130QM100	Altera	OT PLD	Military	Gull Wing	100	QFP	Rectangular	Plastic/Epoxy	55 ns	Yes	5.5 V		CMOS				5		Flatpack				Macrocell	4.5 V		.65 mm	125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)	Matte Tin	Quad	R-PQFP-G100		3.425 mm	14 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms	e3	33.3 MHz			20 mm		64
EP910DM-40	Altera	UV PLD	Military	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	43 ns	No	5.5 V		CMOS		36	PAL-TYPE	5	5 V	In-Line, Window	DIP40,.6	Programmable Logic Devices		Macrocell	4.5 V	240	2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)	Tin Lead	Dual	R-GDIP-T40		5.588 mm	15.24 mm	No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	25 MHz	24	220 °C (428 °F)	52.07 mm		24
5962-9206202MYX	Altera	UV PLD	Military	Pin/Peg	84	PGA	Square	Ceramic, Metal-Sealed Cofired	59 ns	No	5.5 V	192	CMOS	MIL-STD-883 Class B			5	5 V	Grid Array	PGA84M,11X11	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84		4.96 mm	28.45 mm	No			27.7 MHz		220 °C (428 °F)	28.45 mm	No	64
EPF8452AQM160-4	Altera	Loadable PLD	Military	Gull Wing	160	QFP	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Flatpack				Registered	4.5 V		.65 mm	125 °C (257 °F)	4 Dedicated Inputs, 116 I/O	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G160		4.07 mm	28 mm	No	452 Flip Flops; 336 Logic Elements	e3				28 mm		116
EP900DM	Altera	UV PLD	Military	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	60 ns	No	5.5 V		CMOS		36	PAL-TYPE	5	5 V	In-Line, Window	DIP40,.6	Programmable Logic Devices		Macrocell	4.5 V	240	2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)	Tin Lead	Dual	R-GDIP-T40		5.715 mm	15.24 mm	No	24 Macrocells	e0	20 MHz	24	220 °C (428 °F)	52.07 mm		24
5962-9314401MZC	Altera	UV PLD	Military	Pin/Peg	100	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No	5.5 V		CMOS	MIL-STD-883			5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P100		3.81 mm	33.528 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e4	33.3 MHz			33.528 mm		64
EPM5192GM	Altera	UV PLD	Military	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No		192	CMOS				5	5 V	Grid Array, Window	PGA84M,11X11	Programmable Logic Devices	No	Macrocell			2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P84		4.96 mm	28.45 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)	28.45 mm	No	64
EPM5130GM-2	Altera	UV PLD	Military	Pin/Peg	100	WPGA	Square	Ceramic, Metal-Sealed Cofired	45 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)		Perpendicular	S-CPGA-P100		3.81 mm	33.528 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz			33.528 mm		64
5962-01-397-0246	Altera		Military	J Bend	28	QCCJ	Square	Ceramic	55 ns	Yes			CMOS	38535Q/M;38534H;883B	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		160	1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J28	1			No		e0	18.2 MHz	16
EP320DM-1	Altera	UV PLD	Military	Through-Hole	20	WDIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	9 Dedicated Inputs, 8 I/O	9	-55 °C (-67 °F)		Dual	R-GDIP-T20		4.826 mm	7.62 mm	No	8 Macrocells; Shared Input/Clock		58.8 MHz			24.003 mm		8
EPF81188RM208-2	Altera	Loadable PLD	Military	Gull Wing	208	HFQFP	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Flatpack, Heat Sink/Slug, Fine Pitch				Registered	4.5 V		.5 mm	125 °C (257 °F)	4 Dedicated Inputs	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G208		4.1 mm	28 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3				28 mm
EPM5128ALM-20	Altera	OT PLD	Military	J Bend	68	QCCJ	Square	Plastic/Epoxy	33 ns	Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		66.7 MHz			24.23 mm		52
EPM5032DM-25	Altera	UV PLD	Military	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No			CMOS		24	PAL-TYPE	5	5 V	In-Line, Window	DIP28,.3	Programmable Logic Devices		Macrocell		320	2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 16 I/O	7	-55 °C (-67 °F)	Tin Lead	Dual	R-GDIP-T28		5.08 mm	7.62 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz	16	220 °C (428 °F)	36.83 mm		16
EPF8820RM160-2	Altera	Loadable PLD	Military	Gull Wing	160	HQFP	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Flatpack, Heat Sink/Slug				Registered	4.5 V		.65 mm	125 °C (257 °F)	4 Dedicated Inputs	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G160		3.91 mm	28 mm	No	820 Flip Flops; 672 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3				28 mm
5962-8947601XX	Altera	UV PLD	Military	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	37 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V			125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J28				No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	28.6 MHz					16
EPM7256EGM883B192-15	Altera	EE PLD	Military	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired	15 ns	No	5.5 V		CMOS				5		Grid Array				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 160 I/O	0	-55 °C (-67 °F)		Perpendicular	S-CPGA-P192		5.43 mm	45.15 mm	No	256 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock		76.9 MHz			45.15 mm		160
EPM7256ERM883B-15	Altera	EE PLD	Military	Gull Wing	208	HLFQFP	Square	Plastic/Epoxy	15 ns	Yes		256	CMOS	38535Q/M;38534H;883B				3.3/5,5 V	Flatpack, Heat Sink/Slug, Low Profile, Fine Pitch	HQFP208,1.2SQ,20	Programmable Logic Devices	No				.5 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-PQFP-G208				No		e0			220 °C (428 °F)		No
5962-8947601XA	Altera	UV PLD	Military	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	37 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V			125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J28				No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	28.6 MHz					16
EPM5016DM-20	Altera		Military	Through-Hole	20	DIP	Rectangular	Ceramic	20 ns	No			CMOS		16	PAL-TYPE	5	5 V	In-Line	DIP20,.3	Programmable Logic Devices				160	2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Dual	R-XDIP-T20				No		e0		8	220 °C (428 °F)
5962-9206201MZC	Altera	UV PLD	Military	Pin/Peg	84	PGA	Square	Ceramic, Metal-Sealed Cofired	90 ns	No	5.5 V		CMOS	MIL-STD-883 Class B			5		Grid Array				Macrocell	4.5 V			125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84				No			19.6 MHz					64
EPF8636ARM160-4	Altera	Loadable PLD	Military	Gull Wing	160	HQFP	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Flatpack, Heat Sink/Slug				Registered	4.5 V		.65 mm	125 °C (257 °F)	4 Dedicated Inputs	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G160		3.91 mm	28 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3				28 mm
EPM5032PM-25	Altera	OT PLD	Military	Through-Hole	28	DIP	Rectangular	Plastic/Epoxy	25 ns	No	5.5 V		CMOS		24	PAL-TYPE	5	5 V	In-Line	DIP28,.3	Programmable Logic Devices		Macrocell	4.5 V	320	2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 16 I/O	7	-55 °C (-67 °F)	Tin Lead	Dual	R-PDIP-T28		4.57 mm	7.62 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz	16	220 °C (428 °F)	34.48 mm		16
5962-9314401MZX	Altera	UV PLD	Military	Pin/Peg	100	PGA	Square	Ceramic, Metal-Sealed Cofired	75 ns	No	5.5 V		CMOS	MIL-STD-883 Class B			5		Grid Array				Macrocell	4.5 V			125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)		Perpendicular	S-CPGA-P100				No			22.2 MHz					64
EPF81188ARM240-4	Altera	Loadable PLD	Military	Gull Wing	240	FQFP	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Flatpack, Fine Pitch				Registered	4.5 V		.5 mm	125 °C (257 °F)	4 Dedicated Inputs, 180 I/O	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G240		4.2 mm	32 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3				32 mm		180
EPF8820RM208-3	Altera	Loadable PLD	Military	Gull Wing	208	HFQFP	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Flatpack, Heat Sink/Slug, Fine Pitch				Registered	4.5 V		.5 mm	125 °C (257 °F)	4 Dedicated Inputs, 148 I/O	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G208		4.1 mm	28 mm	No	820 Flip Flops; 672 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3				28 mm		148
EPM5032DM5962-25	Altera	UV PLD	Military	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 16 I/O	7	-55 °C (-67 °F)		Dual	R-GDIP-T28		5.334 mm	7.62 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock		50 MHz			36.83 mm		16
EP910JM883B	Altera		Military	J Bend	44	QCCJ	Square	Ceramic	40 ns	Yes			CMOS	38535Q/M;38534H;883B	36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell		240	1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J44				No		e0	25 MHz	24	220 °C (428 °F)
EP610DM-40	Altera		Military	Through-Hole	24	DIP	Rectangular	Ceramic	35 ns	No			CMOS		20	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell		160	2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Dual	R-XDIP-T24				No		e0	25 MHz	16	220 °C (428 °F)
5962-9316801MXX	Altera	EE PLD	Military	Pin/Peg	160	PGA	Square	Ceramic, Metal-Sealed Cofired	20 ns	No	2.625 V		CMOS	MIL-STD-883			2.5		Grid Array				Macrocell	2.375 V		2.54 mm	125 °C (257 °F)	0 Dedicated Inputs	0	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P160		5.34 mm	39.624 mm	No	192 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e4	62.5 MHz			39.624 mm
EPM7256EWM883B208-20	Altera	EE PLD	Military	Gull Wing	208	FQFP	Square	Ceramic, Metal-Sealed Cofired	20 ns	Yes	5.5 V		CMOS				5		Flatpack, Fine Pitch				Macrocell	4.5 V		.5 mm	125 °C (257 °F)	0 Dedicated Inputs, 160 I/O	0	-55 °C (-67 °F)	Matte Tin	Quad	S-CQFP-G208		3.82 mm	27.2 mm	No	256 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e3	62.5 MHz			27.2 mm		160
EPM9480RM160-15	Altera	EE PLD	Military	Gull Wing	160	HQFP	Square	Plastic/Epoxy	15 ns	Yes	5.5 V		CMOS				5		Flatpack, Heat Sink/Slug				Macrocell	4.5 V		.65 mm	125 °C (257 °F)	0 Dedicated Inputs, 117 I/O	0	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G160		3.91 mm	28 mm	No	480 Macrocells; 676 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e3	118 MHz			28 mm		117
5962-9314402MXX	Altera	UV PLD	Military	Gull Wing	100	QFP	Rectangular	Ceramic, Metal-Sealed Cofired	59 ns	Yes	5.5 V	128	CMOS	MIL-STD-883 Class B			5	5 V	Flatpack	QFP100,.7X.9	Programmable Logic Devices	No	Macrocell	4.5 V		.635 mm	125 °C (257 °F)	19 Dedicated Inputs, 63 I/O	19	-55 °C (-67 °F)	Matte Tin	Quad	R-CQFP-G100		3.35 mm	13.2 mm	No		e3	27.7 MHz		220 °C (428 °F)	19.2 mm	No	63
5962-9206202MZC	Altera	UV PLD	Military	Pin/Peg	84	PGA	Square	Ceramic, Metal-Sealed Cofired	59 ns	No	5.5 V		CMOS	MIL-STD-883 Class B			5		Grid Array				Macrocell	4.5 V			125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84				No			27.7 MHz					64
EP610JM-35	Altera	UV PLD	Military	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	37 ns	Yes	5.5 V		CMOS		20	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	160	1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J28		4.826 mm	11.43 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	28.6 MHz	16	220 °C (428 °F)	11.43 mm		16
EPF10K50BM356-5	Altera	Loadable PLD	Military	Ball	356	HLBGA	Square	Plastic/Epoxy	27 ns	Yes	5.5 V		CMOS				5		Grid Array, Heat Sink/Slug, Low Profile				Registered	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 310 I/O	4	-55 °C (-67 °F)	Tin Silver Copper	Bottom	S-PBGA-B356		1.63 mm	35 mm	No	2880 Logic elements Configurable I/O operation with 3.3 V or 5 V	e1	53.76 MHz			35 mm		310
EPM5032D5962-25	Altera	UV PLD	Military	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 16 I/O	7	-55 °C (-67 °F)		Dual	R-GDIP-T28		5.08 mm	7.62 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock		50 MHz			36.83 mm		16
EPF10K100GM504-5	Altera	Loadable PLD	Military	Pin/Peg	504	PGA	Square	Ceramic, Metal-Sealed Cofired	27 ns	No	5.5 V		CMOS				5		Grid Array				Registered	4.5 V			125 °C (257 °F)	4 Dedicated Inputs, 406 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P504				No	4992 Logic elements Configurable I/O operation with 3.3 V or 5 V		53.76 MHz					406
EPM9560GM280-25	Altera	EE PLD	Military	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	25 ns	No	5.5 V		CMOS				5		Grid Array				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 216 I/O	0	-55 °C (-67 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	560 Macrocells; 772 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		66.7 MHz			49.78 mm		216
EP310DMB	Altera		Military	Through-Hole	20	DIP	Rectangular	Ceramic		No			CMOS		18	PAL-TYPE	5	5 V	In-Line	DIP20,.3	Programmable Logic Devices		Macrocell		74	2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Dual	R-XDIP-T20						e0	23.8 MHz	8	220 °C (428 °F)
EPF81188AQM208-4	Altera	Loadable PLD	Military	Gull Wing	208	FQFP	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Flatpack, Fine Pitch				Registered	4.5 V		.5 mm	125 °C (257 °F)	4 Dedicated Inputs, 144 I/O	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G208		3.91 mm	28 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3				28 mm		144
EP910LM-40	Altera	OT PLD	Military	J Bend	44	QCCJ	Square	Plastic/Epoxy	43 ns	Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)		Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks		25 MHz			16.5862 mm		24
EPF8452ALM84-3	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	452 Flip Flops; 336 Logic Elements					29.3116 mm		64
5962-01-302-7053	Altera		Military	J Bend	28	QCCJ	Square	Ceramic	55 ns	Yes			CMOS	38535Q/M;38534H;883B	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		160	1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J28	1			No		e0	18.2 MHz	16
EP610JM883BX	Altera		Military	J Bend	28	QCCJ	Square	Ceramic	37 ns	Yes			CMOS	38535Q/M;38534H;883B	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell		160	1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J28				No		e0	28.6 MHz	16	220 °C (428 °F)

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.