Military Programmable Logic Devices (PLD) 1,614

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EPF10K70QM240-4	Altera	Loadable PLD	Military	Gull Wing	240	FQFP	Square	Plastic/Epoxy	23.8 ns	Yes	5.5 V		CMOS				5		Flatpack, Fine Pitch				Registered	4.5 V		.5 mm	125 °C (257 °F)	4 Dedicated Inputs	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G240		4.1 mm	32 mm	No	3744 Logic elements; Built-in JTAG boundry-scan test circuitry	e3	60.6 MHz			32 mm
EPM9320LM84-12	Altera	EE PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	12 ns	Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	0 Dedicated Inputs, 55 I/O	0	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	320 Macrocells; 484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		118 MHz			29.3116 mm		55
EPF81188ARM208-6	Altera	Loadable PLD	Military	Gull Wing	208	HFQFP	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Flatpack, Heat Sink/Slug, Fine Pitch				Registered	4.5 V		.5 mm	125 °C (257 °F)	4 Dedicated Inputs	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G208		4.1 mm	28 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3				28 mm
EPM9480GM280-15	Altera	EE PLD	Military	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	15 ns	No	5.5 V		CMOS				5		Grid Array				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 200 I/O	0	-55 °C (-67 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	480 Macrocells; 676 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		118 MHz			49.78 mm		200
EP600DM883B	Altera		Military	Through-Hole	24	DIP	Rectangular	Ceramic, Metal-Sealed Cofired	55 ns	No	5.5 V		CMOS	MIL-STD-883 Class B	20	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.5 V	160	2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Dual	R-CDIP-T24				No	16 Macrocells	e0	23.3 MHz	16	220 °C (428 °F)			16
EPM9400LM84-12	Altera	EE PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	12 ns	Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	0 Dedicated Inputs, 59 I/O	0	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	400 Macrocells; 580 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		118 MHz			29.3116 mm		59
EPM9560RM304-15	Altera	EE PLD	Military	Gull Wing	304	HFQFP	Square	Plastic/Epoxy	15 ns	Yes	5.5 V		CMOS				5		Flatpack, Heat Sink/Slug, Fine Pitch				Macrocell	4.5 V		.5 mm	125 °C (257 °F)	0 Dedicated Inputs, 216 I/O	0	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G304		4.5 mm	40 mm	No	560 Macrocells; 772 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e3	117.6 MHz			40 mm		216
EPF10K20LM84-4	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	23.8 ns	Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	1152 Logic elements; Built-in JTAG boundry-scan test circuitry		60.6 MHz			29.3116 mm
EPF81188RM208-3	Altera	Loadable PLD	Military	Gull Wing	208	HFQFP	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Flatpack, Heat Sink/Slug, Fine Pitch				Registered	4.5 V		.5 mm	125 °C (257 °F)	4 Dedicated Inputs	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G208		4.1 mm	28 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3				28 mm
EPF8636ALM84-5	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V					29.3116 mm		64
5962-01-343-0218	Altera	UV PLD	Military	J Bend	68	QCCJ	Square	Ceramic	90 ns	Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J68	1			No		e0					No
EPF10K30QM240-4	Altera	Loadable PLD	Military	Gull Wing	240	FQFP	Square	Plastic/Epoxy	23.8 ns	Yes	5.5 V		CMOS				5		Flatpack, Fine Pitch				Registered	4.5 V		.5 mm	125 °C (257 °F)	4 Dedicated Inputs	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G240		4.1 mm	32 mm	No	1728 Logic elements; Built-in JTAG boundry-scan test circuitry	e3	60.6 MHz			32 mm
EP320DM	Altera	UV PLD	Military	Through-Hole	20	WDIP	Rectangular	Ceramic, Glass-Sealed	45 ns	No	5.5 V		CMOS		18	PAL-TYPE	5	5 V	In-Line, Window	DIP20,.3	Programmable Logic Devices		Macrocell	4.5 V	72	2.54 mm	125 °C (257 °F)	9 Dedicated Inputs, 8 I/O	9	-55 °C (-67 °F)	Tin Lead	Dual	R-GDIP-T20		4.826 mm	7.62 mm	No	8 Macrocells; Shared Input/Clock	e0	30.3 MHz	8	220 °C (428 °F)	24.003 mm		8
EPF8452QM160-2	Altera	Loadable PLD	Military	Gull Wing	160	QFP	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Flatpack				Registered	4.5 V		.65 mm	125 °C (257 °F)	4 Dedicated Inputs, 116 I/O	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G160		4.07 mm	28 mm	No	Labs With Fasttrack Interconnect; 452 Flip Flops; 336 Logic Elements	e3				28 mm		116
EPF8282VTM100-4	Altera	Loadable PLD	Military	Gull Wing	100	LFQFP	Square	Plastic/Epoxy		Yes			CMOS				3.3		Flatpack, Low Profile, Fine Pitch				Registered			.5 mm	125 °C (257 °F)	4 Dedicated Inputs, 74 I/O	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G100		1.27 mm	14 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry	e3				14 mm		74
EPM5192GM84	Altera	UV PLD	Military	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84		4.96 mm	27.94 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz			27.94 mm		64
EPF8282VTM100-3	Altera	Loadable PLD	Military	Gull Wing	100	LFQFP	Square	Plastic/Epoxy		Yes			CMOS				3.3		Flatpack, Low Profile, Fine Pitch				Registered			.5 mm	125 °C (257 °F)	4 Dedicated Inputs, 74 I/O	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G100		1.27 mm	14 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry	e3				14 mm		74
EPM9560GM280-20	Altera	EE PLD	Military	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	20 ns	No	5.5 V		CMOS				5		Grid Array				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 216 I/O	0	-55 °C (-67 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	560 Macrocells; 772 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		95.2 MHz			49.78 mm		216
EPM5128AGM68-12	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	20 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P68		4.953 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		111.1 MHz			27.94 mm		52
EPM5192AJM84-20	Altera	UV PLD	Military	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	33 ns	Yes	5.5 V	192	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	66.7 MHz		220 °C (428 °F)	29.21 mm	No	64
EPM5128AJM-20	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	33 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		66.7 MHz			24.13 mm		52
EPF8452ALM84-4	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	452 Flip Flops; 336 Logic Elements					29.3116 mm		64
5962-8946901YX	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No	5.5 V	48	CMOS	38535Q/M;38534H;883B			5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P68		3.81 mm	27.94 mm	No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e4	22.2 MHz		220 °C (428 °F)	27.94 mm	No	48
EPM5016LM-20	Altera		Military	J Bend	20	QCCJ	Square	Plastic/Epoxy	20 ns	Yes			CMOS		16	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices				160	1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-PQCC-J20				No		e0		8	220 °C (428 °F)
EPM5032DM883B-25	Altera	UV PLD	Military	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No	5.5 V		CMOS			PAL-TYPE	5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 16 I/O	7	-55 °C (-67 °F)		Dual	R-GDIP-T28		5.08 mm	7.62 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock		50 MHz			36.83 mm		16
EPF10K30BM356-4	Altera	Loadable PLD	Military	Ball	356	HLBGA	Square	Plastic/Epoxy	23.8 ns	Yes	5.5 V		CMOS				5		Grid Array, Heat Sink/Slug, Low Profile				Registered	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs	4	-55 °C (-67 °F)	Tin Silver Copper	Bottom	S-PBGA-B356		1.63 mm	35 mm	No	1728 Logic elements Configurable I/O operation with 3.3 V or 5 V	e1	60.6 MHz			35 mm
EP610APM-10	Altera	OT PLD	Military	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	10 ns	No	5.5 V		CMOS				5		In-Line				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)		Dual	R-PDIP-T24		4.318 mm	7.62 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks		100 MHz			31.6865 mm		16
EPF8636ALM84-3	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V					29.3116 mm		64
EPM5128AGM68-20	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	33 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P68		4.953 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		66.7 MHz			27.94 mm		52
EPM5128JMB	Altera	UV PLD	Military	J Bend	68	QCCJ	Square	Ceramic	35 ns	Yes		128	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J68						e0			220 °C (428 °F)		No
EPM5128AG5962-20	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	33 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P68		3.81 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		66.7 MHz			27.94 mm		52
EPF8636ARM160-3	Altera	Loadable PLD	Military	Gull Wing	160	HQFP	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Flatpack, Heat Sink/Slug				Registered	4.5 V		.65 mm	125 °C (257 °F)	4 Dedicated Inputs	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G160		3.91 mm	28 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3				28 mm
EPF10K50QM240-5	Altera	Loadable PLD	Military	Gull Wing	240	FQFP	Square	Plastic/Epoxy	27 ns	Yes	5.5 V		CMOS				5		Flatpack, Fine Pitch				Registered	4.5 V		.5 mm	125 °C (257 °F)	4 Dedicated Inputs, 189 I/O	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G240		4.1 mm	32 mm	No	2880 Logic elements; Built-in JTAG boundry-scan test circuitry	e3	53.76 MHz			32 mm		189
EPM5064LM44	Altera	OT PLD	Military	J Bend	44	QCCJ	Square	Plastic/Epoxy	55 ns	Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 28 I/O	7	-55 °C (-67 °F)		Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No	64 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz			16.5862 mm		28
EPF81188ARM208-3	Altera	Loadable PLD	Military	Gull Wing	208	HFQFP	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Flatpack, Heat Sink/Slug, Fine Pitch				Registered	4.5 V		.5 mm	125 °C (257 °F)	4 Dedicated Inputs	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G208		4.1 mm	28 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3				28 mm
EP600JM883B	Altera	UV PLD	Military	J Bend	28	QCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns	Yes	5.5 V		CMOS	MIL-STD-883 Class B	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	160	1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	16 Macrocells	e0	22.2 MHz	16	220 °C (428 °F)	11.43 mm		16
EPM7256EQM160-15	Altera	EE PLD	Military	Gull Wing	160	QFP	Square	Plastic/Epoxy	15 ns	Yes	5.5 V		CMOS				5		Flatpack				Macrocell	4.5 V		.65 mm	125 °C (257 °F)	0 Dedicated Inputs, 128 I/O	0	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G160		4.07 mm	28 mm	No	256 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e3	76.9 MHz			28 mm		128
EP610DM-35	Altera	UV PLD	Military	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	37 ns	No	5.5 V		CMOS		20	PAL-TYPE	5	5 V	In-Line, Window	DIP24,.3	Programmable Logic Devices		Macrocell	4.5 V	160	2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Dual	R-GDIP-T24		5.334 mm	7.62 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	28.6 MHz	16	220 °C (428 °F)	31.75 mm		16
EPM9320GM280-12	Altera	EE PLD	Military	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	12 ns	No	5.5 V		CMOS				5		Grid Array				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 168 I/O	0	-55 °C (-67 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	320 Macrocells; 484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		118 MHz			49.78 mm		168
EPS448DM28-20	Altera	UV PLD	Military	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed		No	5.5 V		CMOS				5		In-Line, Window				Registered	4.5 V		2.54 mm	125 °C (257 °F)	8 Dedicated Inputs, 0 I/O	8	-55 °C (-67 °F)		Dual	R-GDIP-T28		5.08 mm	7.62 mm	No	PLS		20 MHz			36.83 mm		0
EP1210DMB	Altera		Military	Through-Hole	40	DIP	Rectangular	Ceramic		No			CMOS		36	PAL-TYPE			In-Line	DIP40,.6	Programmable Logic Devices				236	2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Dual	R-XDIP-T40						e0	12.5 MHz	24	220 °C (428 °F)
EP1800GMB	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	90 ns	No	5.5 V	48	CMOS				5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P68		5.0038 mm	27.94 mm	No	48 Macrocells	e0			220 °C (428 °F)	27.94 mm	No	48
EPM5128GM-2	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	45 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P68		3.81 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz			27.94 mm		52
EPF81188ARM208-4	Altera	Loadable PLD	Military	Gull Wing	208	HFQFP	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Flatpack, Heat Sink/Slug, Fine Pitch				Registered	4.5 V		.5 mm	125 °C (257 °F)	4 Dedicated Inputs	4	-55 °C (-67 °F)	Matte Tin	Quad	S-PQFP-G208		4.1 mm	28 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3				28 mm
EPM5192AGM84-15	Altera	UV PLD	Military	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	25 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84		4.96 mm	27.94 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock		83.3 MHz			27.94 mm		64
EPM5128LM-2	Altera	OT PLD	Military	J Bend	68	QCCJ	Square	Plastic/Epoxy	45 ns	Yes	5.5 V		CMOS				5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz			24.23 mm		52
EPF8636ALM84-4	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy		Yes	5.5 V		CMOS				5		Chip Carrier				Registered	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V					29.3116 mm		64
EPF10K70GM504-5	Altera	Loadable PLD	Military	Pin/Peg	504	PGA	Square	Ceramic, Metal-Sealed Cofired	27 ns	No	5.5 V		CMOS				5		Grid Array				Registered	4.5 V			125 °C (257 °F)	4 Dedicated Inputs, 358 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P504				No	3744 Logic elements Configurable I/O operation with 3.3 V or 5 V		53.76 MHz					358

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.