PGA Programmable Logic Devices (PLD) 304

Reset All

Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EPM7256SGC192-15	Altera	EE PLD	Commercial	Pin/Peg	192	PGA	Square	Ceramic	15 ns		No		256	CMOS				3.3/5,5 V	Grid Array	PGA192M,17X17	Programmable Logic Devices	Yes			2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Perpendicular	S-XPGA-P192	1			No		e0			220 °C (428 °F)		Yes
EP1800GC	Altera	UV PLD	Commercial	Pin/Peg	68	PGA	Square	Ceramic	90 ns		No		48	CMOS			5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No			2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Perpendicular	S-XPGA-P68	1			No		e0			220 °C (428 °F)		No
EPF8820GM192-2	Altera	Loadable PLD	Military	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS			5		Grid Array				Registered	4.5 V	2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 148 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P192		5.43 mm	45.15 mm	No	820 Flip Flops; 672 Logic elements; Configurable I/O operation with 3.3 V or 5 V					45.15 mm		148
EPF8452AGM160-4	Altera	Loadable PLD	Military	Pin/Peg	160	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS			5		Grid Array				Registered	4.5 V	2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 116 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P160		5.34 mm	39.624 mm	No	452 Flip Flops; 336 Logic Elements					39.624 mm		116
EPF81500AGI280-2	Altera	Loadable PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	1.7 ns	1296	No	3.6 V		CMOS		208	3.3	3.3/5,5 V	Grid Array	PGA280,19X19	Field Programmable Gate Arrays		Registered	3 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 208 I/O	4	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	Can also operate at 5 V supply	e0		204	220 °C (428 °F)	49.78 mm		208
EPM7192EGI160-7	Altera	EE PLD	Industrial	Pin/Peg	160	PGA	Square	Ceramic	7.5 ns		No		192	CMOS				3.3/5,5 V	Grid Array	PGA160M,15X15	Programmable Logic Devices	No			2.54 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Perpendicular	S-XPGA-P160	1			No		e0			220 °C (428 °F)		No
EPF8820GC192-2	Altera	Loadable PLD	Commercial	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired		672	No	5.25 V		CMOS		152	5	3.3/5,5 V	Grid Array	PGA192,17X17	Field Programmable Gate Arrays		Registered	4.75 V	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 148 I/O	4	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P192	1	5.43 mm	45.15 mm	No	820 Flip Flops; 672 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0		148	220 °C (428 °F)	45.15 mm		148
EP1810GI-40	Altera	OT PLD	Industrial	Pin/Peg	68	PGA	Square	Ceramic	45 ns		No		48	CMOS			5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No			2.54 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Perpendicular	S-XPGA-P68	1			No		e0			220 °C (428 °F)		No
EPM7192EGM160-20	Altera	EE PLD	Military	Pin/Peg	160	PGA	Square	Ceramic, Metal-Sealed Cofired	20 ns		No	5.5 V	192	CMOS			5	3.3/5,5 V	Grid Array	PGA160M,15X15	Programmable Logic Devices	No	Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 120 I/O	0	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P160		5.34 mm	39.624 mm	No	192 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e0	62.5 MHz		220 °C (428 °F)	39.624 mm	No	120
EPF8820AGI192-4	Altera	Loadable PLD	Industrial	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired		672	No	5.5 V		CMOS		152	5	3.3/5,5 V	Grid Array	PGA192M,17X17	Field Programmable Gate Arrays		Registered	4.5 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 132 I/O	4	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P192	1	5.43 mm	45.15 mm	No	820 Flip Flops; 672 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0		148	220 °C (428 °F)	45.15 mm		132
EPF8452AGI160-4	Altera	Loadable PLD	Industrial	Pin/Peg	160	PGA	Square	Ceramic, Metal-Sealed Cofired		336	No	5.5 V		CMOS		120	5	3.3/5,5 V	Grid Array	PGA160M,15X15	Field Programmable Gate Arrays		Registered	4.5 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 116 I/O	4	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P160	1	5.34 mm	39.624 mm	No	452 Flip Flops; 336 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0		116	220 °C (428 °F)	39.624 mm		116
5962-9324702MXX	Altera	EE PLD	Military	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired	15 ns		No	2.625 V		CMOS	MIL-STD-883		2.5		Grid Array				Macrocell	2.375 V	2.54 mm	125 °C (257 °F)	0 Dedicated Inputs	0	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P192		5.43 mm	45.15 mm	No	256 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e4	76.9 MHz			45.15 mm
EPF8452AGM160-6	Altera	Loadable PLD	Military	Pin/Peg	160	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS			5		Grid Array				Registered	4.5 V	2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 116 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P160		5.34 mm	39.624 mm	No	452 Flip Flops; 336 Logic Elements					39.624 mm		116
5962-9316802MXX	Altera	EE PLD	Military	Pin/Peg	160	PGA	Square	Ceramic, Metal-Sealed Cofired	15 ns		No	2.625 V		CMOS	MIL-STD-883		2.5		Grid Array				Macrocell	2.375 V	2.54 mm	125 °C (257 °F)	0 Dedicated Inputs	0	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P160		5.34 mm	39.624 mm	No	192 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e4	76.9 MHz			39.624 mm
EPF81188AGM232-6	Altera	Loadable PLD	Military	Pin/Peg	232	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS			5		Grid Array				Registered	4.5 V	2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 180 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P232		5.207 mm	44.7 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V					44.7 mm		180
EPF8636AGI192-4	Altera	Loadable PLD	Industrial	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired		504	No	5.5 V		CMOS		136	5	3.3/5,5 V	Grid Array	PGA192M,17X17	Field Programmable Gate Arrays		Registered	4.5 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 130 I/O	4	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P192	1	5.43 mm	45.15 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0		132	220 °C (428 °F)	45.15 mm		130

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.