OT PLD Programmable Logic Devices (PLD) 2,400+

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Part RoHS Manufacturer Programmable IC Type Grading Of Temperature Form Of Terminal No. of Terminals Package Code Package Shape Package Body Material Propagation Delay No. of Logic Cells Surface Mount Maximum Supply Voltage No. of Macro Cells Technology Used Screening Level No. of Inputs Architecture Nominal Supply Voltage (V) Packing Method Power Supplies (V) Package Style (Meter) Package Equivalence Code Sub-Category In-System Programmable Output Function Minimum Supply Voltage No. of Product Terms Pitch Of Terminal Maximum Operating Temperature Organization No. of Dedicated Inputs Minimum Operating Temperature Finishing Of Terminal Used Position Of Terminal JESD-30 Code Moisture Sensitivity Level (MSL) Maximum Seated Height Width Qualification Additional Features JESD-609 Code Maximum Clock Frequency Maximum Time At Peak Reflow Temperature (s) No. of Outputs Peak Reflow Temperature (C) Length JTAG Boundary Scan Test No. of I/O Lines

SLG46127M

Renesas Electronics

OT PLD

No Lead

16

VQCCN

Rectangular

Yes

1.89 V

7

6

PLA-TYPE

1.8

Chip Carrier, Very Thin Profile

LCC16,.06X.08,16

No

Macrocell

1.71 V

.4 mm

85 °C (185 °F)

1 Dedicated Inputs, 5 I/O

1

-40 °C (-40 °F)

Quad

R-XQCC-N16

1

.6 mm

1.6 mm

Can also operate at 3.3 V or 5 V supply

5

2 mm

No

5

SLG46200V

Renesas Electronics

OT PLD

No Lead

8

HVSON

Square

Plastic/Epoxy

Yes

3.6 V

6

PLA-TYPE

3.3

Small Outline, Heat Sink/Slug, Very Thin Profile

SOLCC8,.08,20

No

Macrocell

3 V

.5 mm

85 °C (185 °F)

1 Dedicated Inputs, 5 I/O

1

-40 °C (-40 °F)

Dual

S-PDSO-N8

1

.8 mm

2 mm

5

2 mm

No

5

SLG46880-APTR

Renesas Electronics

OT PLD

No Lead

32

HVQCCN

Square

Yes

5.5 V

12

AEC-Q100

20

2.5

Tape and Reel

Chip Carrier, Heat Sink/Slug, Very Thin Profile

LCC32,.2SQ,20

No

Macrocell

2.3 V

.5 mm

125 °C (257 °F)

8 Dedicated Inputs, 12 I/O

8

-40 °C (-40 °F)

Quad

S-XQCC-N32

.8 mm

5 mm

20

5 mm

No

12

SLG46625-APTR

Renesas Electronics

OT PLD

SLG47115

Renesas Electronics

OT PLD

SLG47115VTR

Renesas Electronics

OT PLD

SLG46625-AP

Renesas Electronics

OT PLD

SLG47115V

Renesas Electronics

OT PLD

SLG4LC4412V

Renesas Electronics

OT PLD

SLG4LC4438V

Renesas Electronics

OT PLD

SLG4LC4564V

Renesas Electronics

OT PLD

SLG4LC4480V

Renesas Electronics

OT PLD

PLX448P-45

Broadcom

OT PLD

Commercial

Through-Hole

24

DIP

Rectangular

Plastic/Epoxy

45 ns

No

5.25 V

8

CMOS

26

PAL-TYPE

5

5 V

In-Line

DIP24,.3

Programmable Logic Devices

Macrocell

4.75 V

88

2.54 mm

70 °C (158 °F)

9 Dedicated Inputs, 8 I/O

9

0 °C (32 °F)

Tin Lead

Dual

R-PDIP-T24

4.699 mm

7.62 mm

No

PAL with Macrocells; 8 Macrocells; 2 External Clocks; Shared Input/Clock

e0

16.7 MHz

8

31.75 mm

8

PLX448JC-45

Broadcom

OT PLD

Commercial

J Bend

28

QCCJ

Square

Ceramic, Metal-Sealed Cofired

45 ns

Yes

5.25 V

8

CMOS

26

PAL-TYPE

5

5 V

Chip Carrier

LDCC28,.5SQ

Programmable Logic Devices

Macrocell

4.75 V

88

1.27 mm

70 °C (158 °F)

9 Dedicated Inputs, 8 I/O

9

0 °C (32 °F)

Tin Lead

Quad

S-CQCC-J28

5.59 mm

11.6332 mm

No

PAL with Macrocells; 8 Macrocells; 2 External Clocks; Shared Input/Clock

e0

16.7 MHz

8

11.6332 mm

8

PLX464P-45

Broadcom

OT PLD

Commercial

Through-Hole

24

DIP

Rectangular

Plastic/Epoxy

45 ns

No

5.25 V

8

CMOS

26

PAL-TYPE

5

5 V

In-Line

DIP24,.3

Programmable Logic Devices

Macrocell

4.75 V

88

2.54 mm

70 °C (158 °F)

9 Dedicated Inputs, 8 I/O

9

0 °C (32 °F)

Tin Lead

Dual

R-PDIP-T24

4.699 mm

7.62 mm

No

PAL with Macrocells; 8 Macrocells; 2 External Clocks; Shared Input/Clock

e0

16.7 MHz

8

31.75 mm

8

EPX780LC84-15Z

Altera

OT PLD

Commercial

J Bend

84

QCCJ

Square

Plastic/Epoxy

18 ns

80

Yes

5.25 V

CMOS

62

5

5 V

Chip Carrier

LDCC84,1.2SQ

Field Programmable Gate Arrays

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 60 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J84

5.08 mm

29.3116 mm

No

8 Labs; 80 Macrocells Configurable I/O operation with 3.3 V or 5 V

e0

50 MHz

62

220 °C (428 °F)

29.3116 mm

60

EP600IPC-55

Altera

OT PLD

Commercial

Through-Hole

24

DIP

Rectangular

Plastic/Epoxy

55 ns

No

5.25 V

5

In-Line

Macrocell

4.75 V

2.54 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Dual

R-PDIP-T24

3.81 mm

7.62 mm

Seated HGT-NOM

e0

23.3 MHz

220 °C (428 °F)

26.162 mm

EP320PI-2

Altera

OT PLD

Industrial

Through-Hole

20

DIP

Rectangular

Plastic/Epoxy

35 ns

No

5.5 V

CMOS

18

PAL-TYPE

5

5 V

In-Line

DIP20,.3

Programmable Logic Devices

Macrocell

4.5 V

72

2.54 mm

85 °C (185 °F)

9 Dedicated Inputs, 8 I/O

9

-40 °C (-40 °F)

Tin Lead

Dual

R-PDIP-T20

7.62 mm

No

8 Macrocells; Shared Input/Clock

e0

40 MHz

8

220 °C (428 °F)

26.162 mm

8

EP1810LI-40

Altera

OT PLD

Industrial

J Bend

68

QCCJ

Square

Plastic

45 ns

Yes

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

1.27 mm

85 °C (185 °F)

-40 °C (-40 °F)

Tin Lead

Quad

S-PQCC-J68

No

e0

220 °C (428 °F)

No

EPX740LC44-15Z

Altera

OT PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

18 ns

40

Yes

5.25 V

CMOS

32

5

5 V

Chip Carrier

LDCC44,.7SQ

Field Programmable Gate Arrays

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

0 Dedicated Inputs, 30 I/O

0

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J44

4.57 mm

16.5862 mm

No

4 Labs; 40 Macrocells Configurable I/O operation with 3.3 V or 5 V

e0

50 MHz

32

220 °C (428 °F)

16.5862 mm

30

EP610LM-35

Altera

OT PLD

Military

J Bend

28

QCCJ

Square

Plastic/Epoxy

37 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

125 °C (257 °F)

4 Dedicated Inputs, 16 I/O

4

-55 °C (-67 °F)

Quad

S-PQCC-J28

4.572 mm

11.5062 mm

No

Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks

28.6 MHz

11.5062 mm

16

EP910LI44-30

Altera

OT PLD

Industrial

J Bend

44

QCCJ

Square

Plastic/Epoxy

33 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Quad

S-PQCC-J44

4.57 mm

16.5862 mm

No

24 Macrocells; 2 External Clocks

41.7 MHz

16.5862 mm

24

EP1810LI68-35

Altera

OT PLD

Industrial

J Bend

68

QCCJ

Square

Plastic/Epoxy

40 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 48 I/O

12

-40 °C (-40 °F)

Quad

S-PQCC-J68

5.08 mm

24.2316 mm

No

48 Macrocells; Shared Input/Clock

40 MHz

24.2316 mm

48

EP610ASI-10

Altera

OT PLD

Industrial

Gull Wing

24

SOP

Rectangular

Plastic/Epoxy

10 ns

Yes

5.5 V

CMOS

5

Small Outline

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

4 Dedicated Inputs, 16 I/O

4

-40 °C (-40 °F)

Dual

R-PDSO-G24

2.65 mm

7.5 mm

No

Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks

100 MHz

15.4 mm

16

EP610SI-20T

Altera

OT PLD

Industrial

Gull Wing

24

SOP

Rectangular

Plastic/Epoxy

22 ns

Yes

5.5 V

CMOS

5

Small Outline

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

4 Dedicated Inputs, 16 I/O

4

-40 °C (-40 °F)

Dual

R-PDSO-G24

2.65 mm

7.5 mm

No

55.6 MHz

15.4 mm

16

EP610LC-20T

Altera

OT PLD

Commercial

J Bend

28

QCCJ

Square

Plastic/Epoxy

22 ns

Yes

5.25 V

CMOS

20

PAL-TYPE

5

5 V

Chip Carrier

LDCC28,.5SQ

Programmable Logic Devices

Macrocell

4.75 V

160

1.27 mm

70 °C (158 °F)

4 Dedicated Inputs, 16 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J28

4.57 mm

11.5062 mm

No

Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks

e0

55.6 MHz

16

220 °C (428 °F)

11.5062 mm

16

EP1810LC68-25

Altera

OT PLD

Commercial

J Bend

68

QCCJ

Square

Plastic/Epoxy

28 ns

Yes

5.25 V

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

12 Dedicated Inputs, 48 I/O

12

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J68

5.08 mm

24.2316 mm

No

48 Macrocells; Shared Input/Clock

e0

50 MHz

220 °C (428 °F)

24.2316 mm

No

48

EPM5128ALM68-20

Altera

OT PLD

Military

J Bend

68

QCCJ

Square

Plastic/Epoxy

33 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

125 °C (257 °F)

7 Dedicated Inputs, 52 I/O

7

-55 °C (-67 °F)

Quad

S-PQCC-J68

5.08 mm

24.2316 mm

No

Labs interconnected by PIA; 8 Labs; 1 External Clock

66.7 MHz

24.2316 mm

52

EPM5130QC

Altera

OT PLD

Commercial

Gull Wing

100

QFP

Square

Plastic/Epoxy

55 ns

Yes

5.25 V

128

CMOS

5

5 V

Flatpack

QFP100,.7X.9

Programmable Logic Devices

No

Macrocell

4.75 V

.635 mm

70 °C (158 °F)

19 Dedicated Inputs, 64 I/O

19

0 °C (32 °F)

Tin Lead

Quad

S-PQFP-G100

3

No

Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock

e0

33.3 MHz

220 °C (428 °F)

No

64

5962-01-429-6233

Altera

OT PLD

Military

Pin/Peg

68

PGA

Square

Ceramic

50 ns

No

48

CMOS

38535Q/M;38534H;883B

5

5 V

Grid Array

PGA68,11X11

Programmable Logic Devices

No

2.54 mm

125 °C (257 °F)

-55 °C (-67 °F)

Perpendicular

S-XPGA-P68

No

No

EP1210LI-2

Altera

OT PLD

Industrial

J Bend

44

QCCJ

Square

Plastic/Epoxy

65 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Quad

S-PQCC-J44

16.6116 mm

No

28 Macrocells

23.2 MHz

16.6116 mm

24

EPM5032LI28-15

Altera

OT PLD

Industrial

J Bend

28

QCCJ

Square

Plastic/Epoxy

15 ns

Yes

5.5 V

CMOS

5

Chip Carrier

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

7 Dedicated Inputs, 16 I/O

7

-40 °C (-40 °F)

Quad

S-PQCC-J28

4.57 mm

11.5062 mm

No

32 Macrocells

83.3 MHz

11.5062 mm

16

EP910LC44-30

Altera

OT PLD

Commercial

J Bend

44

QCCJ

Square

Plastic/Epoxy

33 ns

Yes

5.25 V

CMOS

36

PAL-TYPE

5

5 V

Chip Carrier

LDCC44,.7SQ

Programmable Logic Devices

Macrocell

4.75 V

240

1.27 mm

70 °C (158 °F)

12 Dedicated Inputs, 24 I/O

12

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J44

4.57 mm

16.5862 mm

No

24 Macrocells; 2 External Clocks

e0

41.7 MHz

24

220 °C (428 °F)

16.5862 mm

24

EP610SI-20

Altera

OT PLD

Industrial

Gull Wing

24

SOP

Rectangular

Plastic/Epoxy

22 ns

Yes

5.5 V

CMOS

20

PAL-TYPE

5

5 V

Small Outline

SOP24,.4

Programmable Logic Devices

Macrocell

4.5 V

160

1.27 mm

85 °C (185 °F)

4 Dedicated Inputs, 16 I/O

4

-40 °C (-40 °F)

Tin Lead

Dual

R-PDSO-G24

No

Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks

e0

55.6 MHz

16

220 °C (428 °F)

16

MP1810LC-35

Altera

OT PLD

Commercial

J Bend

68

QCCJ

Square

Plastic/Epoxy

40 ns

Yes

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

1.27 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J68

No

e0

220 °C (428 °F)

No

EPM5128ALC68-12

Altera

OT PLD

Commercial

J Bend

68

QCCJ

Square

Plastic/Epoxy

20 ns

Yes

5.25 V

CMOS

5

Chip Carrier

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

7 Dedicated Inputs, 52 I/O

7

0 °C (32 °F)

Quad

S-PQCC-J68

5.08 mm

24.2316 mm

No

Labs interconnected by PIA; 8 Labs; 1 External Clock

111.1 MHz

24.2316 mm

52

MP1810LC-25

Altera

OT PLD

Commercial

J Bend

68

QCCJ

Square

Plastic/Epoxy

28 ns

Yes

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

1.27 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J68

No

e0

220 °C (428 °F)

No

EP1830JM-30

Altera

OT PLD

Military

J Bend

68

QCCJ

Square

Ceramic

34 ns

Yes

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

1.27 mm

125 °C (257 °F)

-55 °C (-67 °F)

Tin Lead

Quad

S-XQCC-J68

No

e0

220 °C (428 °F)

No

EP610SC-20

Altera

OT PLD

Commercial

Gull Wing

24

SOP

Rectangular

Plastic/Epoxy

22 ns

Yes

5.25 V

CMOS

20

PAL-TYPE

5

5 V

Small Outline

SOP24,.4

Programmable Logic Devices

Macrocell

4.75 V

160

1.27 mm

70 °C (158 °F)

4 Dedicated Inputs, 16 I/O

4

0 °C (32 °F)

Tin Lead

Dual

R-PDSO-G24

No

Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks

e0

55.6 MHz

16

220 °C (428 °F)

16

EP22V10LC-10

Altera

OT PLD

Commercial

J Bend

28

QCCJ

Square

Plastic/Epoxy

10 ns

Yes

5.25 V

CMOS

22

PAL-TYPE

5

5 V

Chip Carrier

LDCC28,.5SQ

Programmable Logic Devices

Macrocell

4.75 V

132

1.27 mm

70 °C (158 °F)

11 Dedicated Inputs, 10 I/O

11

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J28

4.57 mm

11.505 mm

No

Macrocells Interconnected By Global Bus; 10 Macrocells; 1 External Clock

e0

95.2 MHz

10

220 °C (428 °F)

11.505 mm

10

EPS448PC28-20

Altera

OT PLD

Commercial

Through-Hole

28

DIP

Rectangular

Plastic/Epoxy

No

5.25 V

CMOS

5

In-Line

Registered

4.75 V

2.54 mm

70 °C (158 °F)

8 Dedicated Inputs, 0 I/O

8

0 °C (32 °F)

Dual

R-PDIP-T28

4.318 mm

7.62 mm

No

PLS

20 MHz

34.29 mm

0

EP910PI40-35

Altera

OT PLD

Industrial

Through-Hole

40

DIP

Rectangular

Plastic/Epoxy

38 ns

No

5.5 V

CMOS

36

PAL-TYPE

5

5 V

In-Line

DIP40,.6

Programmable Logic Devices

Macrocell

4.5 V

240

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Dual

R-PDIP-T40

4.826 mm

15.24 mm

No

24 Macrocells; 2 External Clocks

e0

37 MHz

24

220 °C (428 °F)

52.4256 mm

24

EPM5128ALC68-20

Altera

OT PLD

Commercial

J Bend

68

QCCJ

Square

Plastic/Epoxy

33 ns

Yes

5.25 V

CMOS

5

Chip Carrier

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

7 Dedicated Inputs, 52 I/O

7

0 °C (32 °F)

Quad

S-PQCC-J68

5.08 mm

24.2316 mm

No

Labs interconnected by PIA; 8 Labs; 1 External Clock

66.7 MHz

220 °C (428 °F)

24.2316 mm

52

EPM5032LC28-17

Altera

OT PLD

Commercial

J Bend

28

QCCJ

Square

Plastic/Epoxy

17 ns

Yes

5.25 V

CMOS

5

Chip Carrier

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

7 Dedicated Inputs, 16 I/O

7

0 °C (32 °F)

Quad

S-PQCC-J28

4.572 mm

11.5062 mm

No

32 Macrocells; Shared Input/Clock; Shared Product Terms

71.4 MHz

11.5062 mm

16

EP600PI-3

Altera

OT PLD

Industrial

Through-Hole

24

DIP

Rectangular

Plastic/Epoxy

45 ns

No

5.5 V

CMOS

20

PAL-TYPE

5

5 V

In-Line

DIP24,.3

Programmable Logic Devices

Macrocell

4.5 V

160

2.54 mm

85 °C (185 °F)

4 Dedicated Inputs, 16 I/O

4

-40 °C (-40 °F)

Tin Lead

Dual

R-PDIP-T24

7.62 mm

No

16 Macrocells

e0

26.3 MHz

16

220 °C (428 °F)

26.162 mm

16

EP610ASC-10

Altera

OT PLD

Commercial

Gull Wing

24

SOP

Rectangular

Plastic/Epoxy

10 ns

Yes

5.25 V

CMOS

20

PAL-TYPE

5

5 V

Small Outline

SOP24,.4

Programmable Logic Devices

Macrocell

4.75 V

160

1.27 mm

70 °C (158 °F)

4 Dedicated Inputs, 16 I/O

4

0 °C (32 °F)

Tin Lead

Dual

R-PDSO-G24

2.65 mm

7.5 mm

No

Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks

e0

100 MHz

16

220 °C (428 °F)

15.4 mm

16

EP610LC-15

Altera

OT PLD

Commercial

J Bend

28

QCCJ

Square

Plastic/Epoxy

17 ns

Yes

5.25 V

CMOS

20

PAL-TYPE

5

5 V

Chip Carrier

LDCC28,.5SQ

Programmable Logic Devices

Macrocell

4.75 V

160

1.27 mm

70 °C (158 °F)

4 Dedicated Inputs, 16 I/O

4

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J28

No

Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks

e0

71.4 MHz

16

220 °C (428 °F)

16

EP1800LC-1

Altera

OT PLD

Commercial

J Bend

68

QCCJ

Square

Plastic/Epoxy

90 ns

Yes

5.25 V

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

12 Dedicated Inputs, 48 I/O

12

0 °C (32 °F)

Tin Lead

Quad

S-PQCC-J68

24.2316 mm

No

48 Macrocells

e0

25 MHz

220 °C (428 °F)

24.2316 mm

No

48

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.