OT PLD Programmable Logic Devices (PLD) 2,400+

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EPM5192ALI84-15	Altera	OT PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.5 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 64 I/O	7	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	83.3 MHz		220 °C (428 °F)	29.3116 mm	No	64
EPM5128LC68	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.25 V	128	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms	e0	33.3 MHz		220 °C (428 °F)	24.23 mm	No	52
EP610LC-25T	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	27 ns		Yes	5.25 V		CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.57 mm	11.5062 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	40 MHz	16	220 °C (428 °F)	11.5062 mm		16
EPS448LC-30	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes	5.25 V		CMOS			5		Chip Carrier				Registered	4.75 V		1.27 mm	70 °C (158 °F)	8 Dedicated Inputs, 0 I/O	8	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	Stand-Alone Microsequencer	e0	30 MHz		220 °C (428 °F)	11.5062 mm		0
EPS464QC-25	Altera	OT PLD	Commercial	Gull Wing	44	QFP	Square	Plastic/Epoxy	25 ns		Yes	5.25 V		CMOS			5		Flatpack				Macrocell	4.75 V		.8 mm	70 °C (158 °F)	0 Dedicated Inputs, 32 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQFP-G44	3	2.23 mm	10 mm	No	Macrocells Interconnected By Global Bus; Synchronous Timing Generator; 64 Macrocells	e0	50 MHz		220 °C (428 °F)	10 mm		32
EP1810LI-25	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	28 ns		Yes	5.5 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68				No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	40 MHz		220 °C (428 °F)		No	48
EPM5128LI68-1	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	40 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 52 I/O	7	-40 °C (-40 °F)		Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	128 Macrocells; 8 Labs		62.5 MHz			24.23 mm		52
EPX780LC84-12	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	15 ns	80	Yes	5.25 V		CMOS	62		5	5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	8 Labs; 80 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	58.8 MHz	62	220 °C (428 °F)	29.3116 mm		60
EP610SC-25T	Altera	OT PLD	Commercial	Gull Wing	24	SOP	Rectangular	Plastic/Epoxy	27 ns		Yes	5.25 V		CMOS	20	PAL-TYPE	5	5 V	Small Outline	SOP24,.4	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Dual	R-PDSO-G24		2.65 mm	7.5 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	40 MHz	16	220 °C (428 °F)	15.4 mm		16
EP910ILI44-25	Altera	OT PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.25 V		CMOS			5		Chip Carrier				Macrocell	4.75 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No			62.5 MHz			16.5862 mm		24
EP1800LI-3	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	80 ns		Yes	5.5 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68			24.2316 mm	No	48 Macrocells	e0	18.5 MHz		220 °C (428 °F)	24.2316 mm	No	48
EP1810LI68-25	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	28 ns		Yes	5.5 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No	48 Macrocells; Shared Input/Clock	e0	50 MHz		220 °C (428 °F)	24.2316 mm	No	48
EP910LI-30	Altera	OT PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	30 ns		Yes	5.5 V					5		Chip Carrier				Macrocell	4.5 V			85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Quad	S-PQCC-J44				No			41.7 MHz					24
EP330SI20-15	Altera	OT PLD	Industrial	Gull Wing	20	SOP	Rectangular	Plastic/Epoxy	16 ns		Yes	5.5 V		CMOS			5		Small Outline				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	9 Dedicated Inputs, 8 I/O	9	-40 °C (-40 °F)		Dual	R-PDSO-G20		2.65 mm	7.5 mm	No	8 Macrocells; Shared Input/Clock		83.3 MHz			12.8 mm		8
EPM5127LC-2	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy			Yes		128	CMOS			5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44				No		e0			220 °C (428 °F)		No
EPX780QI132-15	Altera	OT PLD	Industrial	Gull Wing	132	BQFP	Square	Plastic/Epoxy	15 ns	80	Yes	5.5 V		CMOS	104		5	5 V	Flatpack, Bumper	SPQFP132,1.1SQ	Field Programmable Gate Arrays		Macrocell	4.5 V		.635 mm	85 °C (185 °F)	22 Dedicated Inputs, 80 I/O	22	-40 °C (-40 °F)	Tin Lead	Quad	S-PQFP-G132	3	4.57 mm	24.13 mm	No	8 Labs; 80 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	58.8 MHz	104	220 °C (428 °F)	24.13 mm		80
EP910IPI40-25	Altera	OT PLD	Industrial	Through-Hole	40	DIP	Rectangular	Plastic/Epoxy	25 ns		No	5.25 V		CMOS			5		In-Line				Macrocell	4.75 V		2.54 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Dual	R-PDIP-T40		4.83 mm	15.24 mm	No			62.5 MHz			52.425 mm		24
EP610SC24-25T	Altera	OT PLD	Commercial	Gull Wing	24	SOP	Rectangular	Plastic/Epoxy	27 ns		Yes	5.25 V		CMOS			5		Small Outline				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)		Dual	R-PDSO-G24		2.65 mm	7.5 mm	No	16 Macrocells; 2 External Clocks		40 MHz			15.4 mm		16
EP910ILC-12	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V		CMOS	36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.75 V	240	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44				No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	76.9 MHz	24	220 °C (428 °F)			24
EP22V10PC-10	Altera	OT PLD	Commercial	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	10 ns		No	5.25 V		CMOS	22	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	132	2.54 mm	70 °C (158 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T24		4.32 mm	7.62 mm	No	Macrocells Interconnected By Global Bus; 10 Macrocells; 1 External Clock	e0	95.2 MHz	10	220 °C (428 °F)	31.68 mm		10
EP600LI	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V		CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	160	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J28			11.5316 mm	No	16 Macrocells	e0	22.2 MHz	16	220 °C (428 °F)	11.5316 mm		16
EP600LI-3	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.5 V		CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	160	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J28			11.5316 mm	No	16 Macrocells	e0	26.3 MHz	16	220 °C (428 °F)	11.5316 mm		16
EPM5032SC-17	Altera	OT PLD	Commercial	Gull Wing	28	SOP	Rectangular	Plastic/Epoxy	17 ns		Yes	5.25 V		CMOS	24	PAL-TYPE	5	5 V	Small Outline	SOP28,.5	Programmable Logic Devices		Macrocell	4.75 V	320	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Dual	R-PDSO-G28		2.65 mm	7.5 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	71.4 MHz	16	220 °C (428 °F)	17.9 mm		16
EP610IPI-15	Altera	OT PLD	Industrial	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	18 ns		No	5.5 V		CMOS			5		In-Line				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Dual	R-PDIP-T24		4.318 mm	7.62 mm	No			66 MHz			31.6865 mm		16
EP610IPC-15	Altera	OT PLD	Commercial	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	18 ns		No	5.25 V		CMOS	20	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	160	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T24		4.318 mm	7.62 mm	No		e0	66 MHz	16	220 °C (428 °F)	31.6865 mm		16
EP320PC-1	Altera	OT PLD	Commercial	Through-Hole	20	DIP	Rectangular	Plastic/Epoxy	25 ns		No	5.25 V		CMOS	18	PAL-TYPE	5	5 V	In-Line	DIP20,.3	Programmable Logic Devices		Macrocell	4.75 V	72	2.54 mm	70 °C (158 °F)	9 Dedicated Inputs, 8 I/O	9	0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T20			7.62 mm	No	8 Macrocells; Shared Input/Clock	e0	58.8 MHz	8	220 °C (428 °F)	26.162 mm		8
EP312LI-30	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	30 ns		Yes	5.5 V		CMOS	22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	200	1.27 mm	85 °C (185 °F)	8 Dedicated Inputs, 12 I/O	8	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	12 Macrocells	e0	50 MHz	12	220 °C (428 °F)	11.5062 mm		12
EP224LC-12	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.25 V		CMOS	22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	72	1.27 mm	70 °C (158 °F)	13 Dedicated Inputs, 8 I/O	13	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	8 Macrocells	e0	90.9 MHz	8	220 °C (428 °F)	11.5062 mm		8
EPM5128LI68-2	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.5 V	128	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 52 I/O	7	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No		e0	40 MHz		220 °C (428 °F)	24.23 mm	No	52
EP1830LI-30	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	34 ns		Yes		48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68				No		e0			220 °C (428 °F)		No
EP224PC-7	Altera	OT PLD	Commercial	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	7.5 ns		No	5.25 V		CMOS	22	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	72	2.54 mm	70 °C (158 °F)	13 Dedicated Inputs, 8 I/O	13	0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T24		4.318 mm	7.62 mm	No	8 Macrocells	e0	100 MHz	8	220 °C (428 °F)	31.6865 mm		8
EPM5128ALI68-15	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 52 I/O	7	-40 °C (-40 °F)		Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		83.3 MHz			24.2316 mm		52
EPM5016LC-20	Altera	OT PLD	Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.25 V		CMOS	16	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 8 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20		4.572 mm	9.017 mm	No	Macrocells interconnected by PIA; 16 Macrocells; 1 External Clock; Shared Input/Clock	e0	62.5 MHz	8	220 °C (428 °F)	9.017 mm		8
EP900LI-3	Altera	OT PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	50 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Quad	S-PQCC-J44			16.6116 mm	No	24 Macrocells		23.8 MHz			16.6116 mm		24
EPX740LC44-12	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns	40	Yes	5.25 V		CMOS	32		5	5 V	Chip Carrier	LDCC44,.7SQ	Field Programmable Gate Arrays		Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 30 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	4 Labs; 40 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	58.8 MHz	32	220 °C (428 °F)	16.5862 mm		30
EP1810LC-35T	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	40 ns		Yes	5.25 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	28.6 MHz		220 °C (428 °F)	24.23 mm	No	48
EPM5016PI-20	Altera	OT PLD	Industrial	Through-Hole	20	DIP	Rectangular	Plastic/Epoxy	20 ns		No	5.5 V		CMOS	16	PAL-TYPE	5	5 V	In-Line	DIP20,.3	Programmable Logic Devices		Macrocell	4.5 V	160	2.54 mm	85 °C (185 °F)	7 Dedicated Inputs, 8 I/O	7	-40 °C (-40 °F)	Tin Lead	Dual	R-PDIP-T20		4.318 mm	7.62 mm	No	Macrocells interconnected by PIA; 16 Macrocells; 1 External Clock; Shared Input/Clock	e0	62.5 MHz	8	220 °C (428 °F)	26.162 mm		8
EP610PC24-20T	Altera	OT PLD	Commercial	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	22 ns		No	5.25 V		CMOS	20	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	160	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T24		4.318 mm	7.62 mm	No	16 Macrocells; 2 External Clocks	e0	55.6 MHz	16	220 °C (428 °F)	31.6865 mm		16
EP610ALM-10	Altera	OT PLD	Military	J Bend	28	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks		100 MHz			11.5062 mm		16
EP1830LC-30	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	34 ns		Yes		48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No		e0			220 °C (428 °F)		No
EP910ILC44-15	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V		CMOS	36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.75 V	240	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	24 Macrocells; 2 External Clocks	e0	100 MHz	24	220 °C (428 °F)	16.5862 mm		24
EPM5192LI84-1	Altera	OT PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	40 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 64 I/O	7	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	192 Macrocells; 12 Labs		62.5 MHz			29.3116 mm		64
EPM5032APC-12	Altera	OT PLD	Commercial	Through-Hole	28	DIP	Rectangular	Plastic/Epoxy	12 ns		No	5.25 V		CMOS	24	PAL-TYPE	5	5 V	In-Line	DIP28,.3	Programmable Logic Devices		Macrocell	4.75 V	320	2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T28		4.57 mm	7.62 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	111.1 MHz	16	220 °C (428 °F)	34.48 mm		16
EP910IPC40-12	Altera	OT PLD	Commercial	Through-Hole	40	DIP	Rectangular	Plastic/Epoxy	12 ns		No	5.25 V		CMOS	36	PAL-TYPE	5	5 V	In-Line	DIP40,.6	Programmable Logic Devices		Macrocell	4.75 V	240	2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T40		4.826 mm	15.24 mm	No	24 Macrocells; 2 External Clocks	e0	125 MHz	24	220 °C (428 °F)	52.4256 mm		24
EPS448LI28-20	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS			5		Chip Carrier				Registered	4.5 V		1.27 mm	85 °C (185 °F)	8 Dedicated Inputs, 0 I/O	8	-40 °C (-40 °F)		Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	PLS		20 MHz			11.5062 mm		0
EPM5130LI84	Altera	OT PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	19 Dedicated Inputs, 48 I/O	19	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz			29.3116 mm		48
EP1800LC-2	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	70 ns		Yes	5.25 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68			24.2316 mm	No	48 Macrocells	e0	20.8 MHz		220 °C (428 °F)	24.2316 mm	No	48
EPX740LC44-10Z	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	12 ns	40	Yes	5.25 V		CMOS	32		5	5 V	Chip Carrier	LDCC44,.7SQ	Field Programmable Gate Arrays		Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 30 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	4 Labs; 40 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	71.4 MHz	32	220 °C (428 °F)	16.5862 mm		30

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.