OT PLD Programmable Logic Devices (PLD) 2,400+

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EP900LC-3	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	50 ns		Yes	5.25 V		CMOS	36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.75 V	240	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44			16.6116 mm	No	24 Macrocells	e0	23.8 MHz	24	220 °C (428 °F)	16.6116 mm		24
EPM5064LC44-1	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	40 ns		Yes	5.25 V	64	CMOS			5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 28 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	64 Macrocells; Shared Input/Clock; Shared Product Terms	e0	50 MHz		220 °C (428 °F)	16.5862 mm	No	28
EPM5128LC-2	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.25 V	128	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz		220 °C (428 °F)		No	52
EP324LC-25	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.25 V		CMOS	36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.75 V	394	1.27 mm	70 °C (158 °F)	8 Dedicated Inputs, 24 I/O	8	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44				No	24 Macrocells	e0	66 MHz	24	220 °C (428 °F)			24
EPX740LC68-10Z	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	12 ns	40	Yes	5.25 V		CMOS	52		5	5 V	Chip Carrier	LDCC68,1.0SQ	Field Programmable Gate Arrays		Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	10 Dedicated Inputs, 40 I/O	10	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	4 Labs; 40 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	71.4 MHz	52	220 °C (428 °F)	24.23 mm		40
EP610LI-20	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	22 ns		Yes	5.5 V		CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	160	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J28				No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	55.6 MHz	16	220 °C (428 °F)			16
EP910IPC40-15	Altera	OT PLD	Commercial	Through-Hole	40	DIP	Rectangular	Plastic/Epoxy	15 ns		No	5.25 V		CMOS			5		In-Line				Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)		Dual	R-PDIP-T40		4.826 mm	15.24 mm	No	24 Macrocells; 2 External Clocks		100 MHz			52.4256 mm		24
EP600ILC-45	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.25 V					5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.3688 mm	11.5316 mm		Seated HGT-NOM	e0	26.3 MHz		220 °C (428 °F)	11.5316 mm
EP1210LC	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	90 ns		Yes	5.25 V		CMOS	36	PAL-TYPE	5		Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.75 V	236	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44			16.6116 mm	No	28 Macrocells	e0	17.5 MHz	24	220 °C (428 °F)	16.6116 mm		24
EP610LC28-35	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	37 ns		Yes	5.25 V		CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	16 Macrocells; 2 External Clocks	e0	37 MHz	16	220 °C (428 °F)	11.5062 mm		16
EPS464LC-25	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.25 V		CMOS			5		Chip Carrier				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 32 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No	Macrocells Interconnected By Global Bus; Synchronous Timing Generator; 64 Macrocells	e0	50 MHz		220 °C (428 °F)	16.5862 mm		32
EP224PC-10	Altera	OT PLD	Commercial	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	10 ns		No	5.25 V		CMOS	22	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	72	2.54 mm	70 °C (158 °F)	13 Dedicated Inputs, 8 I/O	13	0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T24		4.318 mm	7.62 mm	No	8 Macrocells	e0	62.5 MHz	8	220 °C (428 °F)	31.6865 mm		8
EPM7160QC120-3	Altera	OT PLD	Commercial	Gull Wing	120	QFP	Square	Plastic/Epoxy	20 ns		Yes		160	CMOS			5	5 V	Flatpack	QFP120,1.2SQ,32	Programmable Logic Devices	No				.8 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQFP-G120	3			No		e0			220 °C (428 °F)		No
EPM5192AQC-15	Altera	OT PLD	Commercial	Gull Wing	100	QFP	Rectangular	Plastic/Epoxy	25 ns		Yes	5.25 V		CMOS			5		Flatpack				Macrocell	4.75 V		.65 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Matte Tin	Quad	R-PQFP-G100		3.65 mm	14 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e3	83.3 MHz			20 mm		64
EPM5130QC100-1	Altera	OT PLD	Commercial	Gull Wing	100	QFP	Rectangular	Plastic/Epoxy	40 ns		Yes	5.25 V	128	CMOS			5	5 V	Flatpack	QFP100,.7X.9	Programmable Logic Devices	No	Macrocell	4.75 V		.65 mm	70 °C (158 °F)	19 Dedicated Inputs, 64 I/O	19	0 °C (32 °F)	Tin Lead	Quad	R-PQFP-G100	3	3.65 mm	14 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms	e0	50 MHz		220 °C (428 °F)	20 mm	No	64
EPM5016PC20-20	Altera	OT PLD	Commercial	Through-Hole	20	DIP	Rectangular	Plastic/Epoxy	20 ns		No	5.25 V		CMOS			5		In-Line				Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 8 I/O	7	0 °C (32 °F)		Dual	R-PDIP-T20		4.318 mm	7.62 mm	No	16 Macrocells; Shared Input/Clock; Shared Product Terms		62.5 MHz			26.162 mm		8
EP224PC-12	Altera	OT PLD	Commercial	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	12 ns		No	5.25 V		CMOS	22	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	72	2.54 mm	70 °C (158 °F)	13 Dedicated Inputs, 8 I/O	13	0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T24		4.318 mm	7.62 mm	No	8 Macrocells	e0	90.9 MHz	8	220 °C (428 °F)	31.6865 mm		8
EP610PI24-25	Altera	OT PLD	Industrial	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	27 ns		No	5.5 V		CMOS			5		In-Line				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Dual	R-PDIP-T24		4.318 mm	7.62 mm	No	16 Macrocells; 2 External Clocks		47.6 MHz			31.6865 mm		16
EPM5192QC-2	Altera	OT PLD	Commercial	Gull Wing	100	QFP	Rectangular	Plastic/Epoxy	45 ns		Yes	5.25 V	192	CMOS			5	5 V	Flatpack	QFP100,.7X.9	Programmable Logic Devices	No	Macrocell	4.75 V		.65 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Quad	R-PQFP-G100	3	3.13 mm	13.2 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz		220 °C (428 °F)	20 mm	No	64
EP910ILI-15	Altera	OT PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	18 ns		Yes	5.5 V		CMOS	36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.5 V	240	1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.585 mm	No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	66.6 MHz	24	220 °C (428 °F)	16.585 mm		24
EPM5128ALC-20	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	33 ns		Yes	5.25 V	128	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	66.7 MHz		220 °C (428 °F)	24.23 mm	No	52
EP610LC28-15	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	17 ns		Yes	5.25 V		CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	16 Macrocells; 2 External Clocks	e0	83.3 MHz	16	220 °C (428 °F)	11.5062 mm		16
EP910ALC-25	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.25 V		CMOS	36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.75 V	240	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.572 mm	16.5862 mm	No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	40 MHz	24	220 °C (428 °F)	16.5862 mm		24
EP610SI24-20	Altera	OT PLD	Industrial	Gull Wing	24	SOP	Rectangular	Plastic/Epoxy	22 ns		Yes	5.5 V		CMOS			5		Small Outline				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Dual	R-PDSO-G24		2.65 mm	7.5 mm	No	16 Macrocells; 2 External Clocks		62.5 MHz			15.4 mm		16
EPX740LI44-12	Altera	OT PLD	Industrial	J Bend	44	QCCJ	Square	Plastic/Epoxy	15 ns	40	Yes	5.5 V		CMOS	32		5	5 V	Chip Carrier	LDCC44,.7SQ	Field Programmable Gate Arrays		Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 30 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	4 Labs; 40 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	58.8 MHz	32	220 °C (428 °F)	16.5862 mm		30
EP1830GC-30	Altera	OT PLD	Commercial	Pin/Peg	68	PGA	Square	Ceramic	34 ns		No		48	CMOS			5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No				2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Perpendicular	S-XPGA-P68	1			No		e0			220 °C (428 °F)		No
EPM5032SI-20	Altera	OT PLD	Industrial	Gull Wing	28	SOP	Rectangular	Plastic/Epoxy	20 ns		Yes	5.5 V		CMOS	24	PAL-TYPE	5	5 V	Small Outline	SOP28,.5	Programmable Logic Devices		Macrocell	4.5 V	320	1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 16 I/O	7	-40 °C (-40 °F)	Tin Lead	Dual	R-PDSO-G28		2.65 mm	7.5 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	62.5 MHz	16	220 °C (428 °F)	17.9 mm		16
EP610ILC-10	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V		CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28				No		e0	100 MHz	16	220 °C (428 °F)			16
EP610LC-20	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	22 ns		Yes	5.25 V		CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28				No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	55.6 MHz	16	220 °C (428 °F)			16
EPM5192LC-2	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.25 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz		220 °C (428 °F)	29.3116 mm	No	64
EP1800LC-35T	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	35 ns		Yes		48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No		e0			220 °C (428 °F)		No
EPM5128ALC-12	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	20 ns		Yes		128	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68				No		e0			220 °C (428 °F)		No
EPX740LC44-10	Altera	OT PLD	Commercial	J Bend	44	QCCJ	Square	Plastic/Epoxy	12 ns	40	Yes	5.25 V		CMOS	32		5	5 V	Chip Carrier	LDCC44,.7SQ	Field Programmable Gate Arrays		Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 30 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J44		4.57 mm	16.5862 mm	No	4 Labs; 40 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	71.4 MHz	32	220 °C (428 °F)	16.5862 mm		30
EP610APM-10	Altera	OT PLD	Military	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	10 ns		No	5.5 V		CMOS			5		In-Line				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)		Dual	R-PDIP-T24		4.318 mm	7.62 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks		100 MHz			31.6865 mm		16
EPM5192QC	Altera	OT PLD	Commercial	Gull Wing	100	QFP	Rectangular	Plastic/Epoxy	55 ns		Yes	5.25 V	192	CMOS			5	5 V	Flatpack	QFP100,.7X.9	Programmable Logic Devices	No	Macrocell	4.75 V		.65 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Quad	R-PQFP-G100	3	3.13 mm	13.2 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)	20 mm	No	64
EP610LC-15T	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	17 ns		Yes	5.25 V		CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.57 mm	11.5062 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	71.4 MHz	16	220 °C (428 °F)	11.5062 mm		16
EPM5016SC-15	Altera	OT PLD	Commercial	Gull Wing	20	SOP	Rectangular	Plastic/Epoxy	15 ns		Yes	5.25 V		CMOS	16	PAL-TYPE	5	5 V	Small Outline	SOP20,.4	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 8 I/O	7	0 °C (32 °F)	Tin Lead	Dual	R-PDSO-G20		2.65 mm	7.5 mm	No	Macrocells interconnected by PIA; 16 Macrocells; 1 External Clock; Shared Input/Clock	e0	100 MHz	8	220 °C (428 °F)	12.8 mm		8
EPM5192ALI84-20	Altera	OT PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	33 ns		Yes	5.5 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 64 I/O	7	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	66.7 MHz		220 °C (428 °F)	29.3116 mm	No	64
EPM5128ALI68-12	Altera	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 52 I/O	7	-40 °C (-40 °F)		Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		111.1 MHz			24.2316 mm		52
EP600IPC-45	Altera	OT PLD	Commercial	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	45 ns		No	5.25 V					5		In-Line				Macrocell	4.75 V		2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T24		3.81 mm	7.62 mm		Seated HGT-NOM	e0	26.3 MHz		220 °C (428 °F)	26.162 mm
EP610ILI28-10	Altera	OT PLD	Industrial	J Bend	28	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V		CMOS			5		Chip Carrier				Macrocell	4.75 V		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J28		4.572 mm	11.5062 mm	No	16 Macrocells; 2 External Clocks		125 MHz			11.5062 mm		16
EP22V10LC-15	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V		CMOS	22	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	132	1.27 mm	70 °C (158 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28		4.57 mm	11.505 mm	No	Macrocells Interconnected By Global Bus; 10 Macrocells; 1 External Clock	e0	64.5 MHz	10	220 °C (428 °F)	11.505 mm		10
EP22V10EPC-15	Altera	OT PLD	Commercial	Through-Hole	24	DIP	Rectangular	Plastic/Epoxy	15 ns		No	5.25 V		CMOS	22	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	132	2.54 mm	70 °C (158 °F)	11 Dedicated Inputs, 10 I/O	11	0 °C (32 °F)	Tin Lead	Dual	R-PDIP-T24		4.32 mm	7.62 mm	No	Macrocells Interconnected By Global Bus; 10 Macrocells; 1 External Clock	e0	64.5 MHz	10	220 °C (428 °F)	31.68 mm		10
EP220LC-7A	Altera	OT PLD	Commercial	J Bend	20	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.25 V		CMOS	18	PAL-TYPE	5	5 V	Chip Carrier	LDCC20,.4SQ	Programmable Logic Devices		Macrocell	4.75 V	72	1.27 mm	70 °C (158 °F)	9 Dedicated Inputs, 8 I/O	9	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J20		4.572 mm	8.9662 mm	No	8 Macrocells	e0	115 MHz	8	220 °C (428 °F)	8.9662 mm		8
EP610LC-25N	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	27 ns		Yes	5.25 V		CMOS		PAL-TYPE	5		Chip Carrier				Macrocell	4.75 V			70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J28				No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks		40 MHz					16
EPM5128QC-2	Altera	OT PLD	Commercial	Gull Wing	100	QFP	Rectangular	Plastic/Epoxy	30 ns		Yes		128	CMOS			5	5 V	Flatpack	QFP100,.7X.9	Programmable Logic Devices	No				.635 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	R-PQFP-G100	3			No		e0			220 °C (428 °F)		No
EPM5032PI-20	Altera	OT PLD	Industrial	Through-Hole	28	DIP	Rectangular	Plastic/Epoxy	20 ns		No	5.5 V		CMOS	24	PAL-TYPE	5	5 V	In-Line	DIP28,.3	Programmable Logic Devices		Macrocell	4.5 V	320	2.54 mm	85 °C (185 °F)	7 Dedicated Inputs, 16 I/O	7	-40 °C (-40 °F)	Tin Lead	Dual	R-PDIP-T28				No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	62.5 MHz	16	220 °C (428 °F)			16
EP610ILC-15	Altera	OT PLD	Commercial	J Bend	28	QCCJ	Square	Plastic/Epoxy	18 ns		Yes	5.25 V		CMOS	20	PAL-TYPE	5	5 V	Chip Carrier	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J28				No		e0	66 MHz	16	220 °C (428 °F)			16

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.