UV PLD Programmable Logic Devices (PLD) 725

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Part RoHS Manufacturer Programmable IC Type Grading Of Temperature Form Of Terminal No. of Terminals Package Code Package Shape Package Body Material Propagation Delay No. of Logic Cells Surface Mount Maximum Supply Voltage No. of Macro Cells Technology Used Screening Level No. of Inputs Architecture Nominal Supply Voltage (V) Packing Method Power Supplies (V) Package Style (Meter) Package Equivalence Code Sub-Category In-System Programmable Output Function Minimum Supply Voltage No. of Product Terms Pitch Of Terminal Maximum Operating Temperature Organization No. of Dedicated Inputs Minimum Operating Temperature Finishing Of Terminal Used Position Of Terminal JESD-30 Code Moisture Sensitivity Level (MSL) Maximum Seated Height Width Qualification Additional Features JESD-609 Code Maximum Clock Frequency Maximum Time At Peak Reflow Temperature (s) No. of Outputs Peak Reflow Temperature (C) Length JTAG Boundary Scan Test No. of I/O Lines

5962-9206201MYC

Altera

UV PLD

Military

Pin/Peg

84

WPGA

Square

Ceramic, Metal-Sealed Cofired

55 ns

No

5.5 V

CMOS

MIL-STD-883

5

Grid Array, Window

Macrocell

4.5 V

2.54 mm

125 °C (257 °F)

7 Dedicated Inputs, 64 I/O

7

-55 °C (-67 °F)

Gold

Perpendicular

S-CPGA-P84

3.81 mm

27.94 mm

No

Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock

e4

33.3 MHz

27.94 mm

64

EPM7256GC192-25

Altera

UV PLD

Commercial

Pin/Peg

192

WPGA

Square

Ceramic, Metal-Sealed Cofired

25 ns

No

5.25 V

256

CMOS

5

5 V

Grid Array, Window

PGA192M,17X17

Programmable Logic Devices

No

Macrocell

4.75 V

2.54 mm

70 °C (158 °F)

0 Dedicated Inputs, 160 I/O

0

0 °C (32 °F)

Tin Lead

Perpendicular

S-CPGA-P192

1

5.43 mm

45.15 mm

No

256 Macrocells; Shared Input/Clock

e0

40 MHz

220 °C (428 °F)

45.15 mm

No

160

EPS448DC-20

Altera

UV PLD

Commercial

Through-Hole

28

WDIP

Rectangular

Ceramic, Glass-Sealed

No

5.25 V

CMOS

5

In-Line, Window

Registered

4.75 V

2.54 mm

70 °C (158 °F)

8 Dedicated Inputs, 0 I/O

8

0 °C (32 °F)

Tin Lead

Dual

R-GDIP-T28

5.334 mm

7.62 mm

No

Stand-Alone Microsequencer

e0

20 MHz

220 °C (428 °F)

36.83 mm

0

EP610JI-35

Altera

UV PLD

Industrial

J Bend

28

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

37 ns

Yes

5.5 V

CMOS

20

PAL-TYPE

5

5 V

Chip Carrier, Window

LDCC28,.5SQ

Programmable Logic Devices

Macrocell

4.5 V

160

1.27 mm

85 °C (185 °F)

4 Dedicated Inputs, 16 I/O

4

-40 °C (-40 °F)

Tin Lead

Quad

S-CQCC-J28

4.826 mm

11.43 mm

No

Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks

e0

28.6 MHz

16

220 °C (428 °F)

11.43 mm

16

EP1810JC-25

Altera

UV PLD

Commercial

J Bend

68

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

28 ns

Yes

5.25 V

48

CMOS

5

5 V

Chip Carrier, Window

LDCC68,1.0SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

12 Dedicated Inputs, 48 I/O

12

0 °C (32 °F)

Tin Lead

Quad

S-CQCC-J68

5.08 mm

24.13 mm

No

Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks

e0

40 MHz

220 °C (428 °F)

24.13 mm

No

48

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.