UV PLD Programmable Logic Devices (PLD) 725

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Part RoHS Manufacturer Programmable IC Type Grading Of Temperature Form Of Terminal No. of Terminals Package Code Package Shape Package Body Material Propagation Delay No. of Logic Cells Surface Mount Maximum Supply Voltage No. of Macro Cells Technology Used Screening Level No. of Inputs Architecture Nominal Supply Voltage (V) Packing Method Power Supplies (V) Package Style (Meter) Package Equivalence Code Sub-Category In-System Programmable Output Function Minimum Supply Voltage No. of Product Terms Pitch Of Terminal Maximum Operating Temperature Organization No. of Dedicated Inputs Minimum Operating Temperature Finishing Of Terminal Used Position Of Terminal JESD-30 Code Moisture Sensitivity Level (MSL) Maximum Seated Height Width Qualification Additional Features JESD-609 Code Maximum Clock Frequency Maximum Time At Peak Reflow Temperature (s) No. of Outputs Peak Reflow Temperature (C) Length JTAG Boundary Scan Test No. of I/O Lines

5962-9314401MZX

Altera

UV PLD

Military

Pin/Peg

100

PGA

Square

Ceramic, Metal-Sealed Cofired

75 ns

No

5.5 V

CMOS

MIL-STD-883 Class B

5

Grid Array

Macrocell

4.5 V

125 °C (257 °F)

19 Dedicated Inputs, 64 I/O

19

-55 °C (-67 °F)

Perpendicular

S-CPGA-P100

No

22.2 MHz

64

EP910DI40-35

Altera

UV PLD

Industrial

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

38 ns

No

5.5 V

CMOS

36

PAL-TYPE

5

5 V

In-Line, Window

DIP40,.6

Programmable Logic Devices

Macrocell

4.5 V

240

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Dual

R-GDIP-T40

5.75 mm

15.24 mm

No

24 Macrocells; 2 External Clocks

e0

37 MHz

24

220 °C (428 °F)

52.07 mm

24

EPM5032DM5962-25

Altera

UV PLD

Military

Through-Hole

28

WDIP

Rectangular

Ceramic, Glass-Sealed

25 ns

No

5.5 V

CMOS

5

In-Line, Window

Macrocell

4.5 V

2.54 mm

125 °C (257 °F)

7 Dedicated Inputs, 16 I/O

7

-55 °C (-67 °F)

Dual

R-GDIP-T28

5.334 mm

7.62 mm

No

Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock

50 MHz

36.83 mm

16

EP1800JI

Altera

UV PLD

Industrial

J Bend

68

QCCJ

Square

Ceramic

90 ns

Yes

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

1.27 mm

85 °C (185 °F)

-40 °C (-40 °F)

Tin Lead

Quad

S-XQCC-J68

No

e0

220 °C (428 °F)

No

EPM5130JC84

Altera

UV PLD

Commercial

J Bend

84

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

55 ns

Yes

5.25 V

128

CMOS

5

5 V

Chip Carrier, Window

LDCC84,1.2SQ

Programmable Logic Devices

No

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

19 Dedicated Inputs, 48 I/O

19

0 °C (32 °F)

Tin Lead

Quad

S-CQCC-J84

5.08 mm

29.21 mm

No

128 Macrocells; Shared Input/Clock; Shared Product Terms

e0

33.3 MHz

220 °C (428 °F)

29.21 mm

No

48

EP610DI-25

Altera

UV PLD

Industrial

Through-Hole

24

DIP

Rectangular

Ceramic, Glass-Sealed

25 ns

No

5.5 V

5

In-Line

Macrocell

4.5 V

85 °C (185 °F)

4 Dedicated Inputs, 16 I/O

4

-40 °C (-40 °F)

Dual

R-GDIP-T24

No

47.6 MHz

220 °C (428 °F)

16

5962-9314402MXX

Altera

UV PLD

Military

Gull Wing

100

QFP

Rectangular

Ceramic, Metal-Sealed Cofired

59 ns

Yes

5.5 V

128

CMOS

MIL-STD-883 Class B

5

5 V

Flatpack

QFP100,.7X.9

Programmable Logic Devices

No

Macrocell

4.5 V

.635 mm

125 °C (257 °F)

19 Dedicated Inputs, 63 I/O

19

-55 °C (-67 °F)

Matte Tin

Quad

R-CQFP-G100

3.35 mm

13.2 mm

No

e3

27.7 MHz

220 °C (428 °F)

19.2 mm

No

63

5962-9206202MZC

Altera

UV PLD

Military

Pin/Peg

84

PGA

Square

Ceramic, Metal-Sealed Cofired

59 ns

No

5.5 V

CMOS

MIL-STD-883 Class B

5

Grid Array

Macrocell

4.5 V

125 °C (257 °F)

7 Dedicated Inputs, 64 I/O

7

-55 °C (-67 °F)

Perpendicular

S-CPGA-P84

No

27.7 MHz

64

EP312DC-25

Altera

UV PLD

Commercial

Through-Hole

24

DIP

Rectangular

Ceramic, Glass-Sealed

25 ns

No

5.25 V

CMOS

22

PAL-TYPE

5

5 V

In-Line

DIP24,.3

Programmable Logic Devices

Macrocell

4.75 V

200

2.54 mm

70 °C (158 °F)

8 Dedicated Inputs, 12 I/O

8

0 °C (32 °F)

Tin/Lead

Dual

R-GDIP-T24

No

12 Macrocells

e0

66 MHz

30 s

12

220 °C (428 °F)

12

5962-01-418-0528

Altera

UV PLD

Commercial

Pin/Peg

68

PGA

Square

Ceramic

70 ns

No

48

CMOS

5

5 V

Grid Array

PGA68,11X11

Programmable Logic Devices

No

2.54 mm

70 °C (158 °F)

0 °C (32 °F)

Perpendicular

S-XPGA-P68

No

No

EP610JM-35

Altera

UV PLD

Military

J Bend

28

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

37 ns

Yes

5.5 V

CMOS

20

PAL-TYPE

5

5 V

Chip Carrier, Window

LDCC28,.5SQ

Programmable Logic Devices

Macrocell

4.5 V

160

1.27 mm

125 °C (257 °F)

4 Dedicated Inputs, 16 I/O

4

-55 °C (-67 °F)

Tin Lead

Quad

S-CQCC-J28

4.826 mm

11.43 mm

No

Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks

e0

28.6 MHz

16

220 °C (428 °F)

11.43 mm

16

EPM5130JI-2

Altera

UV PLD

Industrial

J Bend

84

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

45 ns

Yes

5.5 V

CMOS

5

Chip Carrier, Window

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

19 Dedicated Inputs, 48 I/O

19

-40 °C (-40 °F)

Quad

S-CQCC-J84

5.08 mm

29.21 mm

No

Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock

40 MHz

29.21 mm

48

EPM5032D5962-25

Altera

UV PLD

Military

Through-Hole

28

WDIP

Rectangular

Ceramic, Glass-Sealed

25 ns

No

5.5 V

CMOS

5

In-Line, Window

Macrocell

4.5 V

2.54 mm

125 °C (257 °F)

7 Dedicated Inputs, 16 I/O

7

-55 °C (-67 °F)

Dual

R-GDIP-T28

5.08 mm

7.62 mm

No

Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock

50 MHz

36.83 mm

16

EP1810JC68-35

Altera

UV PLD

Commercial

J Bend

68

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

40 ns

Yes

5.25 V

CMOS

5

Chip Carrier, Window

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

12 Dedicated Inputs, 48 I/O

12

0 °C (32 °F)

Quad

S-CQCC-J68

5.08 mm

24.13 mm

No

48 Macrocells; Shared Input/Clock

28.6 MHz

24.13 mm

48

EP900DC-3

Altera

UV PLD

Commercial

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

50 ns

No

5.25 V

CMOS

36

PAL-TYPE

5

5 V

In-Line, Window

DIP40,.6

Programmable Logic Devices

Macrocell

4.75 V

240

2.54 mm

70 °C (158 °F)

12 Dedicated Inputs, 24 I/O

12

0 °C (32 °F)

Tin Lead

Dual

R-GDIP-T40

5.715 mm

15.24 mm

No

24 Macrocells

e0

23.8 MHz

24

220 °C (428 °F)

52.07 mm

24

EP1810JC68-25

Altera

UV PLD

Commercial

J Bend

68

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

28 ns

Yes

5.25 V

CMOS

5

Chip Carrier, Window

Macrocell

4.75 V

1.27 mm

70 °C (158 °F)

12 Dedicated Inputs, 48 I/O

12

0 °C (32 °F)

Quad

S-CQCC-J68

5.08 mm

24.13 mm

No

48 Macrocells; Shared Input/Clock

40 MHz

24.13 mm

48

EPM5032DI28-20

Altera

UV PLD

Industrial

Through-Hole

28

WDIP

Rectangular

Ceramic, Glass-Sealed

20 ns

No

5.5 V

CMOS

5

In-Line, Window

Macrocell

4.5 V

2.54 mm

85 °C (185 °F)

7 Dedicated Inputs, 16 I/O

7

-40 °C (-40 °F)

Dual

R-GDIP-T28

5.08 mm

7.62 mm

No

32 Macrocells

71.4 MHz

36.83 mm

16

EPM5192AGC84-15

Altera

UV PLD

Commercial

Pin/Peg

84

WPGA

Square

Ceramic, Metal-Sealed Cofired

25 ns

No

5.25 V

192

CMOS

5

5 V

Grid Array, Window

PGA84M,11X11

Programmable Logic Devices

No

Macrocell

4.75 V

2.54 mm

70 °C (158 °F)

7 Dedicated Inputs, 64 I/O

7

0 °C (32 °F)

Tin Lead

Perpendicular

S-CPGA-P84

1

4.96 mm

27.94 mm

No

Labs interconnected by PIA; 12 Labs; 1 External Clock

e0

83.3 MHz

220 °C (428 °F)

27.94 mm

No

64

EP1800JI-2

Altera

UV PLD

Industrial

J Bend

68

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

70 ns

Yes

5.5 V

48

CMOS

5

5 V

Chip Carrier, Window

LDCC68,1.0SQ

Programmable Logic Devices

No

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 48 I/O

12

-40 °C (-40 °F)

Tin Lead

Quad

S-CQCC-J68

5.08 mm

24.13 mm

No

48 Macrocells

e0

20.8 MHz

220 °C (428 °F)

24.13 mm

No

48

EPM5016DI20-20

Altera

UV PLD

Industrial

Through-Hole

20

WDIP

Rectangular

Ceramic, Glass-Sealed

20 ns

No

5.5 V

CMOS

5

In-Line, Window

Macrocell

4.5 V

2.54 mm

85 °C (185 °F)

7 Dedicated Inputs, 8 I/O

7

-40 °C (-40 °F)

Dual

R-GDIP-T20

5.08 mm

7.62 mm

No

16 Macrocells; Shared Input/Clock; Shared Product Terms

62.5 MHz

24.13 mm

8

EP1800GC-2

Altera

UV PLD

Commercial

Pin/Peg

68

WPGA

Square

Ceramic, Metal-Sealed Cofired

70 ns

No

5.25 V

48

CMOS

5

5 V

Grid Array, Window

PGA68,11X11

Programmable Logic Devices

No

Macrocell

4.75 V

2.54 mm

70 °C (158 °F)

12 Dedicated Inputs, 48 I/O

12

0 °C (32 °F)

Tin Lead

Perpendicular

S-CPGA-P68

1

5.0038 mm

27.94 mm

No

48 Macrocells

e0

20.8 MHz

220 °C (428 °F)

27.94 mm

No

48

EP910IDI-25

Altera

UV PLD

Industrial

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

28 ns

No

5.5 V

CMOS

5

In-Line, Window

Macrocell

4.5 V

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Dual

R-GDIP-T40

5.75 mm

15.24 mm

No

Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks

40 MHz

52.07 mm

24

EP1800JC

Altera

UV PLD

Commercial

J Bend

68

QCCJ

Square

Ceramic

90 ns

Yes

48

CMOS

5

5 V

Chip Carrier

LDCC68,1.0SQ

Programmable Logic Devices

No

1.27 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Quad

S-XQCC-J68

No

e0

220 °C (428 °F)

No

EP610DM24-35

Altera

UV PLD

Military

Through-Hole

24

WDIP

Rectangular

Ceramic, Glass-Sealed

37 ns

No

5.5 V

CMOS

5

In-Line, Window

Macrocell

4.5 V

2.54 mm

125 °C (257 °F)

4 Dedicated Inputs, 16 I/O

4

-55 °C (-67 °F)

Dual

R-GDIP-T24

5.08 mm

7.62 mm

No

16 Macrocells; 2 External Clocks

28.6 MHz

32 mm

16

EP910DI-40

Altera

UV PLD

Industrial

Through-Hole

40

DIP

Rectangular

Ceramic, Glass-Sealed

43 ns

No

5.5 V

CMOS

36

PAL-TYPE

5

5 V

In-Line

DIP40,.6

Programmable Logic Devices

Macrocell

4.5 V

240

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Dual

R-GDIP-T40

No

Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks

e0

25 MHz

24

220 °C (428 °F)

24

EP610JM883BX-35

Altera

UV PLD

Military

J Bend

28

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

37 ns

Yes

5.5 V

CMOS

5

Chip Carrier, Window

Macrocell

4.5 V

1.27 mm

125 °C (257 °F)

4 Dedicated Inputs, 16 I/O

4

-55 °C (-67 °F)

Quad

S-CQCC-J28

4.826 mm

11.43 mm

No

Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks

28.6 MHz

11.43 mm

16

EPM5128GC68-1

Altera

UV PLD

Commercial

Pin/Peg

68

WPGA

Square

Ceramic, Metal-Sealed Cofired

40 ns

No

5.25 V

128

CMOS

5

5 V

Grid Array, Window

PGA68,11X11

Programmable Logic Devices

No

Macrocell

4.75 V

2.54 mm

70 °C (158 °F)

7 Dedicated Inputs, 52 I/O

7

0 °C (32 °F)

Tin Lead

Perpendicular

S-CPGA-P68

1

4.96 mm

27.94 mm

No

128 Macrocells; Shared Input/Clock; Shared Product Terms

e0

50 MHz

220 °C (428 °F)

27.94 mm

No

52

EP1210JI

Altera

UV PLD

Industrial

J Bend

44

WQCCJ

Square

Ceramic, Glass-Sealed

90 ns

Yes

5.5 V

CMOS

36

PAL-TYPE

5

Chip Carrier, Window

LDCC44,.7SQ

Programmable Logic Devices

Macrocell

4.5 V

236

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Quad

S-GQCC-J44

4.57 mm

16.51 mm

No

28 Macrocells

e0

17.5 MHz

24

220 °C (428 °F)

16.51 mm

24

EP320DI

Altera

UV PLD

Industrial

Through-Hole

20

WDIP

Rectangular

Ceramic, Glass-Sealed

45 ns

No

5.5 V

CMOS

18

PAL-TYPE

5

5 V

In-Line, Window

DIP20,.3

Programmable Logic Devices

Macrocell

4.5 V

72

2.54 mm

85 °C (185 °F)

9 Dedicated Inputs, 8 I/O

9

-40 °C (-40 °F)

Tin Lead

Dual

R-GDIP-T20

4.826 mm

7.62 mm

No

8 Macrocells; Shared Input/Clock

e0

30.3 MHz

8

220 °C (428 °F)

24.003 mm

8

EP600DI-3

Altera

UV PLD

Industrial

Through-Hole

24

WDIP

Rectangular

Ceramic, Glass-Sealed

45 ns

No

5.5 V

CMOS

20

PAL-TYPE

5

5 V

In-Line, Window

DIP24,.3

Programmable Logic Devices

Macrocell

4.5 V

160

2.54 mm

85 °C (185 °F)

4 Dedicated Inputs, 16 I/O

4

-40 °C (-40 °F)

Tin Lead

Dual

R-GDIP-T24

4.826 mm

7.62 mm

No

16 Macrocells

e0

26.3 MHz

16

220 °C (428 °F)

31.9405 mm

16

EP910JI44-40

Altera

UV PLD

Industrial

J Bend

44

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

43 ns

Yes

5.5 V

CMOS

5

Chip Carrier, Window

Macrocell

4.5 V

1.27 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Quad

S-CQCC-J44

4.57 mm

16.51 mm

No

24 Macrocells; 2 External Clocks

25 MHz

16.51 mm

24

EPM5128AJM68-12

Altera

UV PLD

Military

J Bend

68

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

20 ns

Yes

5.5 V

CMOS

5

Chip Carrier, Window

Macrocell

4.5 V

1.27 mm

125 °C (257 °F)

7 Dedicated Inputs, 52 I/O

7

-55 °C (-67 °F)

Quad

S-CQCC-J68

5.08 mm

24.13 mm

No

Labs interconnected by PIA; 8 Labs; 1 External Clock

111.1 MHz

24.13 mm

52

EP1800GC

Altera

UV PLD

Commercial

Pin/Peg

68

PGA

Square

Ceramic

90 ns

No

48

CMOS

5

5 V

Grid Array

PGA68,11X11

Programmable Logic Devices

No

2.54 mm

70 °C (158 °F)

0 °C (32 °F)

Tin Lead

Perpendicular

S-XPGA-P68

1

No

e0

220 °C (428 °F)

No

EPM5192WC

Altera

UV PLD

Commercial

Gull Wing

100

WQFP

Rectangular

Ceramic, Metal-Sealed Cofired

55 ns

Yes

5.25 V

192

CMOS

5

5 V

Flatpack, Window

QFP100,.7X.9

Programmable Logic Devices

No

Macrocell

4.75 V

.65 mm

70 °C (158 °F)

7 Dedicated Inputs, 64 I/O

7

0 °C (32 °F)

Tin Lead

Quad

R-CQFP-G100

3.35 mm

13.2 mm

No

Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock

e0

33.3 MHz

220 °C (428 °F)

19.2 mm

No

64

EPM5130G5962

Altera

UV PLD

Military

Pin/Peg

100

WPGA

Square

Ceramic, Metal-Sealed Cofired

55 ns

No

5.5 V

CMOS

5

Grid Array, Window

Macrocell

4.5 V

2.54 mm

125 °C (257 °F)

19 Dedicated Inputs, 64 I/O

19

-55 °C (-67 °F)

Perpendicular

S-CPGA-P100

3.81 mm

33.528 mm

No

Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock

33.3 MHz

33.528 mm

64

EP600DM

Altera

UV PLD

Military

Through-Hole

24

WDIP

Rectangular

Ceramic, Glass-Sealed

55 ns

No

5.5 V

CMOS

20

PAL-TYPE

5

5 V

In-Line, Window

DIP24,.3

Programmable Logic Devices

Macrocell

4.5 V

160

2.54 mm

125 °C (257 °F)

4 Dedicated Inputs, 16 I/O

4

-55 °C (-67 °F)

Tin Lead

Dual

R-GDIP-T24

4.826 mm

7.62 mm

No

16 Macrocells

e0

22.2 MHz

16

220 °C (428 °F)

31.9405 mm

16

EP910IDI40-15

Altera

UV PLD

Industrial

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

18 ns

No

5.25 V

CMOS

36

PAL-TYPE

5

5 V

In-Line, Window

DIP40,.6

Programmable Logic Devices

Macrocell

4.75 V

240

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Dual

R-GDIP-T40

5.715 mm

15.24 mm

No

e0

66.6 MHz

24

220 °C (428 °F)

52.07 mm

24

EPM5128GC-2

Altera

UV PLD

Commercial

Pin/Peg

68

WPGA

Square

Ceramic, Metal-Sealed Cofired

45 ns

No

5.25 V

128

CMOS

5

5 V

Grid Array, Window

PGA68,11X11

Programmable Logic Devices

No

Macrocell

4.75 V

2.54 mm

70 °C (158 °F)

7 Dedicated Inputs, 52 I/O

7

0 °C (32 °F)

Tin Lead

Perpendicular

S-CPGA-P68

1

4.96 mm

27.94 mm

No

Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock

e0

50 MHz

220 °C (428 °F)

27.94 mm

No

52

EPM5032JM

Altera

UV PLD

Military

J Bend

28

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

25 ns

Yes

CMOS

24

PAL-TYPE

5

5 V

Chip Carrier, Window

LDCC28,.5SQ

Programmable Logic Devices

Macrocell

320

1.27 mm

125 °C (257 °F)

7 Dedicated Inputs, 16 I/O

7

-55 °C (-67 °F)

Tin Lead

Quad

S-CQCC-J28

4.57 mm

11.43 mm

No

e0

62.5 MHz

16

220 °C (428 °F)

11.43 mm

16

EP1210JC

Altera

UV PLD

Commercial

J Bend

44

WQCCJ

Square

Ceramic, Glass-Sealed

90 ns

Yes

5.25 V

CMOS

36

PAL-TYPE

5

Chip Carrier, Window

LDCC44,.7SQ

Programmable Logic Devices

Macrocell

4.75 V

236

1.27 mm

70 °C (158 °F)

12 Dedicated Inputs, 24 I/O

12

0 °C (32 °F)

Tin Lead

Quad

S-GQCC-J44

4.57 mm

16.51 mm

No

28 Macrocells

e0

17.5 MHz

24

220 °C (428 °F)

16.51 mm

24

EP1210DI

Altera

UV PLD

Industrial

Through-Hole

40

WDIP

Rectangular

Ceramic, Glass-Sealed

90 ns

No

5.5 V

CMOS

36

PAL-TYPE

5

In-Line, Window

DIP40,.6

Programmable Logic Devices

Macrocell

4.5 V

236

2.54 mm

85 °C (185 °F)

12 Dedicated Inputs, 24 I/O

12

-40 °C (-40 °F)

Tin Lead

Dual

R-GDIP-T40

5.715 mm

15.24 mm

No

28 Macrocells

e0

17.5 MHz

24

220 °C (428 °F)

52.07 mm

24

5962-9314401MXA

Altera

UV PLD

Military

Gull Wing

100

WQFP

Rectangular

Ceramic, Metal-Sealed Cofired

55 ns

Yes

5.5 V

CMOS

MIL-STD-883

5

Flatpack, Window

Macrocell

4.5 V

.65 mm

125 °C (257 °F)

19 Dedicated Inputs, 64 I/O

19

-55 °C (-67 °F)

Tin Lead

Quad

R-CQFP-G100

2.99 mm

14 mm

No

Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock

e0

33.3 MHz

19.2 mm

64

EPM5032DC-17

Altera

UV PLD

Commercial

Through-Hole

28

WDIP

Rectangular

Ceramic, Glass-Sealed

17 ns

No

5.25 V

CMOS

24

PAL-TYPE

5

5 V

In-Line, Window

DIP28,.3

Programmable Logic Devices

Macrocell

4.75 V

320

2.54 mm

70 °C (158 °F)

7 Dedicated Inputs, 16 I/O

7

0 °C (32 °F)

Tin Lead

Dual

R-GDIP-T28

5.08 mm

7.62 mm

No

Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock

e0

71.4 MHz

16

220 °C (428 °F)

36.83 mm

16

EP910JM883B-40

Altera

UV PLD

Military

J Bend

44

WQCCJ

Square

Ceramic, Metal-Sealed Cofired

43 ns

Yes

5.5 V

CMOS

5

Chip Carrier, Window

Macrocell

4.5 V

1.27 mm

125 °C (257 °F)

12 Dedicated Inputs, 24 I/O

12

-55 °C (-67 °F)

Quad

S-CQCC-J44

4.826 mm

16.51 mm

No

Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks

25 MHz

16.51 mm

24

EP1810G5962-45

Altera

UV PLD

Military

Pin/Peg

68

WPGA

Square

Ceramic, Metal-Sealed Cofired

55 ns

No

5.5 V

CMOS

5

Grid Array, Window

Macrocell

4.5 V

2.54 mm

125 °C (257 °F)

12 Dedicated Inputs, 48 I/O

12

-55 °C (-67 °F)

Perpendicular

S-CPGA-P68

3.81 mm

27.94 mm

No

Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks

22.2 MHz

27.94 mm

48

EPM5128GC

Altera

UV PLD

Commercial

Pin/Peg

68

WPGA

Square

Ceramic, Metal-Sealed Cofired

55 ns

No

5.25 V

128

CMOS

5

5 V

Grid Array, Window

PGA68,11X11

Programmable Logic Devices

No

Macrocell

4.75 V

2.54 mm

70 °C (158 °F)

7 Dedicated Inputs, 52 I/O

7

0 °C (32 °F)

Tin Lead

Perpendicular

S-CPGA-P68

1

4.96 mm

27.94 mm

No

Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock

e0

40 MHz

220 °C (428 °F)

27.94 mm

No

52

EPM5130AWC-15

Altera

UV PLD

Commercial

Gull Wing

100

WQFP

Rectangular

Ceramic, Metal-Sealed Cofired

25 ns

Yes

5.25 V

CMOS

5

Flatpack, Window

Macrocell

4.75 V

.65 mm

70 °C (158 °F)

19 Dedicated Inputs, 64 I/O

19

0 °C (32 °F)

Matte Tin

Quad

R-CQFP-G100

2.99 mm

14 mm

No

Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock

e3

83.3 MHz

19.2 mm

64

EPM5130WC-2

Altera

UV PLD

Commercial

Gull Wing

100

WQFP

Rectangular

Ceramic, Metal-Sealed Cofired

45 ns

Yes

5.25 V

128

CMOS

5

5 V

Flatpack, Window

QFP100,.7X.9

Programmable Logic Devices

No

Macrocell

4.75 V

.65 mm

70 °C (158 °F)

19 Dedicated Inputs, 64 I/O

19

0 °C (32 °F)

Tin Lead

Quad

R-CQFP-G100

2.99 mm

14 mm

No

Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock

e0

40 MHz

220 °C (428 °F)

19.2 mm

No

64

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.