UV PLD Programmable Logic Devices (PLD) 725

Reset All

Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EP1800GMB	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	90 ns	No	5.5 V	48	CMOS				5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P68		5.0038 mm	27.94 mm	No	48 Macrocells	e0			220 °C (428 °F)	27.94 mm	No	48
EPM5128GM-2	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	45 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P68		3.81 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz			27.94 mm		52
EP600JC-1	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns	Yes	5.25 V		CMOS		20	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	160	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	16 Macrocells	e0	45.5 MHz	16	220 °C (428 °F)	11.43 mm		16
EP320DC	Altera	UV PLD	Commercial	Through-Hole	20	WDIP	Rectangular	Ceramic, Glass-Sealed	45 ns	No	5.25 V		CMOS		18	PAL-TYPE	5	5 V	In-Line, Window	DIP20,.3	Programmable Logic Devices		Macrocell	4.75 V	72	2.54 mm	70 °C (158 °F)	9 Dedicated Inputs, 8 I/O	9	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T20		4.826 mm	7.62 mm	No	8 Macrocells; Shared Input/Clock	e0	30.3 MHz	8	220 °C (428 °F)	24.003 mm		8
EP610DI-35	Altera	UV PLD	Industrial	Through-Hole	24	DIP	Rectangular	Ceramic, Glass-Sealed	37 ns	No	5.5 V		CMOS		20	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.5 V	160	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)	Tin Lead	Dual	R-GDIP-T24				No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	28.6 MHz	16	220 °C (428 °F)			16
EPM5192AGM84-15	Altera	UV PLD	Military	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	25 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84		4.96 mm	27.94 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock		83.3 MHz			27.94 mm		64
EP1210DC-2	Altera	UV PLD	Commercial	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	65 ns	No	5.25 V		CMOS		36	PAL-TYPE	5		In-Line, Window	DIP40,.6	Programmable Logic Devices		Macrocell	4.75 V	236	2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T40		5.715 mm	15.24 mm	No	28 Macrocells	e0	23.2 MHz	24	220 °C (428 °F)	52.07 mm		24
EP1810GM-45	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	50 ns	No	5.5 V	48	CMOS				5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P68		3.81 mm	27.94 mm	No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	22.2 MHz		220 °C (428 °F)	27.94 mm	No	48
EP1810GC-45	Altera	UV PLD	Commercial	Pin/Peg	68	PGA	Square	Ceramic, Metal-Sealed Cofired	50 ns	No	5.25 V	48	CMOS				5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P68	1			No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	22.2 MHz		220 °C (428 °F)		No	48
EP1810JI68-45	Altera	UV PLD	Industrial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	50 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells; Shared Input/Clock		22.2 MHz			24.13 mm		48
EP910ADC-25	Altera	UV PLD	Commercial	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No	5.25 V		CMOS		36	PAL-TYPE	5	5 V	In-Line, Window	DIP40,.6	Programmable Logic Devices		Macrocell	4.75 V	240	2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T40		5.588 mm	15.24 mm	No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	40 MHz	24	220 °C (428 °F)	52.07 mm		24
EP1810GI68-20	Altera	UV PLD	Industrial	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	22 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Perpendicular	S-CPGA-P68		4.96 mm	27.94 mm	No	48 Macrocells; Shared Input/Clock		62.5 MHz			27.94 mm		48
EP1800GI-3	Altera	UV PLD	Industrial	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	80 ns	No	5.5 V	48	CMOS				5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P68	1	5.0038 mm	27.94 mm	No	48 Macrocells	e0	18.5 MHz		220 °C (428 °F)	27.94 mm	No	48
EP610DC-15	Altera	UV PLD	Commercial	Through-Hole	24	DIP	Rectangular	Ceramic, Glass-Sealed	17 ns	No	5.25 V		CMOS		20	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	160	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T24				No		e0	71.4 MHz	16	220 °C (428 °F)			16
5962-01-258-1301	Altera	UV PLD	Commercial	J Bend	68	QCCJ	Square	Ceramic	80 ns	Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)		Quad	S-XQCC-J68				No							No
EP610DC24-15	Altera	UV PLD	Commercial	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	17 ns	No	5.25 V		CMOS				5		In-Line, Window				Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)		Dual	R-GDIP-T24		5.08 mm	7.62 mm	No	16 Macrocells; 2 External Clocks		83.3 MHz			32 mm		16
EP1210DI-2	Altera	UV PLD	Industrial	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	65 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Dual	R-GDIP-T40		5.715 mm	15.24 mm	No	28 Macrocells		23.2 MHz			52.07 mm		24
EPM5128JC-2	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	45 ns	Yes	5.25 V	128	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz		220 °C (428 °F)	24.13 mm	No	52
EPM5192GM883B	Altera	UV PLD	Military	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No		192	CMOS	38535Q/M;38534H;883B			5	5 V	Grid Array, Window	PGA84M,11X11	Programmable Logic Devices	No	Macrocell			2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P84		4.96 mm	28.45 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)	28.45 mm	No	64
EP610IDC-10	Altera	UV PLD	Commercial	Through-Hole	24	DIP	Rectangular	Ceramic, Glass-Sealed	15 ns	No	5.25 V		CMOS		20	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	160	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T24				No		e0	100 MHz	16	220 °C (428 °F)			16
5962-01-407-9563	Altera	UV PLD	Military	Pin/Peg	68	PGA	Square	Ceramic	35 ns	No		128	CMOS	38535Q/M;38534H;883B			5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No				2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)		Perpendicular	S-XPGA-P68				No							No
EP1800GC-1	Altera	UV PLD	Commercial	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	90 ns	No	5.25 V	48	CMOS				5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P68	1	5.0038 mm	27.94 mm	No	48 Macrocells	e0	25 MHz		220 °C (428 °F)	27.94 mm	No	48
EPM5130JC84-1	Altera	UV PLD	Commercial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	40 ns	Yes	5.25 V	128	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	19 Dedicated Inputs, 48 I/O	19	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms	e0	50 MHz		220 °C (428 °F)	29.21 mm	No	48
EPM5192GC-1	Altera	UV PLD	Commercial	Pin/Peg	84	PGA	Square	Ceramic, Metal-Sealed Cofired	40 ns	No	5.25 V	192	CMOS				5	5 V	Grid Array	PGA84M,11X11	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P84	1			No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz		220 °C (428 °F)		No	64
EP1810GI-20	Altera	UV PLD	Industrial	Pin/Peg	68	PGA	Square	Ceramic, Metal-Sealed Cofired	20 ns	No	5.5 V						5		Grid Array				Macrocell	4.5 V			85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Perpendicular	S-CPGA-P68				No			62.5 MHz					48
EPM5128G5962	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P68		3.81 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		33.3 MHz			27.94 mm		52
EPM5016DI-20	Altera	UV PLD	Industrial	Through-Hole	20	WDIP	Rectangular	Ceramic, Glass-Sealed	20 ns	No	5.5 V		CMOS		16	PAL-TYPE	5	5 V	In-Line, Window	DIP20,.3	Programmable Logic Devices		Macrocell	4.5 V	160	2.54 mm	85 °C (185 °F)	7 Dedicated Inputs, 8 I/O	7	-40 °C (-40 °F)	Tin Lead	Dual	R-GDIP-T20		5.334 mm	7.62 mm	No	Macrocells interconnected by PIA; 16 Macrocells; 1 External Clock; Shared Input/Clock	e0	62.5 MHz	8	220 °C (428 °F)	24.13 mm		8
EP900JM883B	Altera	UV PLD	Military	J Bend	44	QCCJ	Square	Ceramic, Glass-Sealed	60 ns	Yes	5.5 V		CMOS	MIL-STD-883 Class B	36	PAL-TYPE	5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.5 V	240	1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)	Tin Lead	Quad	S-GQCC-J44		4.57 mm	16.51 mm	No	24 Macrocells	e0	20 MHz	24	220 °C (428 °F)	16.51 mm		24
5962-01-291-5582	Altera	UV PLD	Military	J Bend	68	QCCJ	Square	Ceramic	90 ns	Yes		48	CMOS	38535Q/M;38534H;883B			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)		Quad	S-XQCC-J68				No							No
EP1210DC-1	Altera	UV PLD	Commercial	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	50 ns	No	5.25 V		CMOS		36	PAL-TYPE	5		In-Line, Window	DIP40,.6	Programmable Logic Devices		Macrocell	4.75 V	236	2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T40		5.715 mm	15.24 mm	No	28 Macrocells	e0	28.5 MHz	24	220 °C (428 °F)	52.07 mm		24
EPM5192GI-1	Altera	UV PLD	Industrial	Pin/Peg	84	PGA	Square	Ceramic, Metal-Sealed Cofired	25 ns	No	5.5 V		CMOS				5		Grid Array				Macrocell	4.5 V			85 °C (185 °F)	7 Dedicated Inputs, 64 I/O	7	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P84				No		e0	62.5 MHz					64
EPM5064JC-1	Altera	UV PLD	Commercial	J Bend	44	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	40 ns	Yes	5.25 V	64	CMOS				5	5 V	Chip Carrier, Window	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 28 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J44		4.57 mm	16.51 mm	No	Labs interconnected by PIA; 4 Labs; 64 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz		220 °C (428 °F)	16.51 mm	No	28
EPM5064JC44	Altera	UV PLD	Commercial	J Bend	44	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns	Yes	5.25 V		CMOS				5		Chip Carrier, Window				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 28 I/O	7	0 °C (32 °F)		Quad	S-CQCC-J44		4.57 mm	16.51 mm	No	64 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz			16.51 mm		28
EPM5130JM84	Altera	UV PLD	Military	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	19 Dedicated Inputs, 48 I/O	19	-55 °C (-67 °F)		Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz			29.21 mm		48
EP910JI-35	Altera	UV PLD	Industrial	J Bend	44	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	38 ns	Yes	5.5 V		CMOS		36	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.5 V	240	1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)	Tin Lead	Quad	S-CQCC-J44		4.826 mm	16.51 mm	No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	28.6 MHz	24	220 °C (428 °F)	16.51 mm		24
EPM5192AJC84-20	Altera	UV PLD	Commercial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	33 ns	Yes	5.25 V	192	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	66.7 MHz		220 °C (428 °F)	29.21 mm	No	64
EPM5130JC-1	Altera	UV PLD	Commercial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	40 ns	Yes	5.25 V	128	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	19 Dedicated Inputs, 48 I/O	19	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz		220 °C (428 °F)	29.21 mm	No	48
EP900JMB	Altera	UV PLD	Military	J Bend	44	WQCCJ	Square	Ceramic, Glass-Sealed	60 ns	Yes	5.5 V		CMOS		36	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.5 V	240	1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)	Tin Lead	Quad	S-GQCC-J44		4.57 mm	16.51 mm	No	24 Macrocells	e0	20 MHz	24	220 °C (428 °F)	16.51 mm		24
EPM5128AGC68-15	Altera	UV PLD	Commercial	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	25 ns	No	5.25 V		CMOS				5		Grid Array, Window				Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)		Perpendicular	S-CPGA-P68		4.953 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		83.3 MHz			27.94 mm		52
EPM5016DC20-15	Altera	UV PLD	Commercial	Through-Hole	20	WDIP	Rectangular	Ceramic, Glass-Sealed	15 ns	No	5.25 V		CMOS				5		In-Line, Window				Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 8 I/O	7	0 °C (32 °F)		Dual	R-GDIP-T20		5.08 mm	7.62 mm	No	16 Macrocells; Shared Input/Clock; Shared Product Terms		100 MHz			24.13 mm		8
EP1210DI-1	Altera	UV PLD	Industrial	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	50 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Dual	R-GDIP-T40		5.715 mm	15.24 mm	No	28 Macrocells		28.5 MHz			52.07 mm		24
5962-8872401LX	Altera	UV PLD	Military	Through-Hole	24	DIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No	5.5 V		CMOS	MIL-STD-883			5		In-Line				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	11 Dedicated Inputs, 10 I/O	11	-55 °C (-67 °F)		Dual	R-GDIP-T24		5.08 mm	7.62 mm	No			30.3 MHz			32 mm		10
EPM5192JC84-2	Altera	UV PLD	Commercial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	45 ns	Yes	5.25 V		CMOS				5		Chip Carrier, Window				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)		Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms		40 MHz			29.21 mm		64
EP910IDI-12	Altera	UV PLD	Industrial	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	15 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Dual	R-GDIP-T40		5.75 mm	15.24 mm	No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks		76.9 MHz			52.07 mm		24
EP910IDC-25	Altera	UV PLD	Commercial	Through-Hole	40	DIP	Rectangular	Ceramic, Glass-Sealed	28 ns	No	5.25 V		CMOS		36	PAL-TYPE	5	5 V	In-Line	DIP40,.6	Programmable Logic Devices		Macrocell	4.75 V	240	2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T40				No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	40 MHz	24	220 °C (428 °F)			24
EP1210JMB	Altera	UV PLD	Military	J Bend	44	WQCCJ	Square	Ceramic, Glass-Sealed	90 ns	Yes	5.5 V		CMOS		36	PAL-TYPE	5		Chip Carrier, Window	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.5 V	236	1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)	Tin Lead	Quad	S-GQCC-J44		4.57 mm	16.51 mm	No	28 Macrocells	e0	17.5 MHz	24	220 °C (428 °F)	16.51 mm		24
EPM5128AJC68-12	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	20 ns	Yes	5.25 V		CMOS				5		Chip Carrier, Window				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		111.1 MHz			24.13 mm		52
EP910JI-40	Altera	UV PLD	Industrial	J Bend	44	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	43 ns	Yes	5.5 V		CMOS		36	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.5 V	240	1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)	Tin Lead	Quad	S-CQCC-J44		4.826 mm	16.51 mm	No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	25 MHz	24	220 °C (428 °F)	16.51 mm		24

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.