UV PLD Programmable Logic Devices (PLD) 725

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EP1800GC-3	Altera	UV PLD	Commercial	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	80 ns	No	5.25 V	48	CMOS				5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P68	1	5.0038 mm	27.94 mm	No	48 Macrocells	e0	18.5 MHz			220 °C (428 °F)	27.94 mm	No	48
EPM5032AJC-12	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	12 ns	Yes	5.25 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	320	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	111.1 MHz		16	220 °C (428 °F)	11.43 mm		16
EPS448DI-20	Altera	UV PLD	Industrial	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed		No	5.5 V		CMOS				5		In-Line, Window				Registered	4.5 V		2.54 mm	85 °C (185 °F)	8 Dedicated Inputs, 0 I/O	8	-40 °C (-40 °F)	Tin Lead	Dual	R-GDIP-T28		5.334 mm	7.62 mm	No	Stand-Alone Microsequencer	e0	20 MHz			220 °C (428 °F)	36.83 mm		0
EP910DC40-30	Altera	UV PLD	Commercial	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	33 ns	No	5.25 V		CMOS				5		In-Line, Window				Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)		Dual	R-GDIP-T40		5.75 mm	15.24 mm	No	24 Macrocells; 2 External Clocks		41.7 MHz				52.07 mm		24
5962-01-324-9619	Altera	UV PLD	Military	Pin/Peg	68	PGA	Square	Ceramic	75 ns	No		48	CMOS	38535Q/M;38534H;883B			5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No				2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)		Perpendicular	S-XPGA-P68				No								No
EPM5130AJC-15	Altera	UV PLD	Commercial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns	Yes	5.25 V		CMOS				5		Chip Carrier, Window				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	19 Dedicated Inputs, 48 I/O	19	0 °C (32 °F)		Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		83.3 MHz				29.21 mm		48
EPM5128AJM68-20	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	33 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		66.7 MHz				24.13 mm		52
EPS448JC-30	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired		Yes	5.25 V		CMOS				5		Chip Carrier, Window				Registered	4.75 V		1.27 mm	70 °C (158 °F)	8 Dedicated Inputs, 0 I/O	8	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.826 mm	11.43 mm	No	Stand-Alone Microsequencer	e0	30 MHz			220 °C (428 °F)	11.43 mm		0
EPM5192GC84-1	Altera	UV PLD	Commercial	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	40 ns	No	5.25 V	192	CMOS				5	5 V	Grid Array, Window	PGA84M,11X11	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P84	1	4.96 mm	28.448 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms	e0	50 MHz			220 °C (428 °F)	28.448 mm	No	64
5962-9206201MZX	Altera	UV PLD	Military	Pin/Peg	84	PGA	Square	Ceramic, Metal-Sealed Cofired	90 ns	No	5.5 V		CMOS	MIL-STD-883 Class B			5		Grid Array				Macrocell	4.5 V			125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84				No			19.6 MHz						64
EPM5130JC-2	Altera	UV PLD	Commercial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	45 ns	Yes	5.25 V	128	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	19 Dedicated Inputs, 48 I/O	19	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz			220 °C (428 °F)	29.21 mm	No	48
EP1800JM-3	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired		Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells		18.5 MHz				24.13 mm		48
EP1210DM-1	Altera	UV PLD	Military	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	50 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)		Dual	R-GDIP-T40		5.715 mm	15.24 mm	No	28 Macrocells		28.5 MHz				52.07 mm		24
EP1800JC-2	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	70 ns	Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells	e0	20.8 MHz			220 °C (428 °F)	24.13 mm	No	48
EP610DM883B24-35	Altera	UV PLD	Military	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	37 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)		Dual	R-GDIP-T24		5.08 mm	7.62 mm	No	16 Macrocells; 2 External Clocks		28.5 MHz				32 mm		16
EP1810GC-20	Altera	UV PLD	Commercial	Pin/Peg	68	PGA	Square	Ceramic, Metal-Sealed Cofired	22 ns	No	5.25 V	48	CMOS				5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P68	1			No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	50 MHz			220 °C (428 °F)		No	48
EP1800JC-3	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	80 ns	Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells	e0	18.5 MHz			220 °C (428 °F)	24.13 mm	No	48
EPM5192GM	Altera	UV PLD	Military	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No		192	CMOS				5	5 V	Grid Array, Window	PGA84M,11X11	Programmable Logic Devices	No	Macrocell			2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P84		4.96 mm	28.45 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz			220 °C (428 °F)	28.45 mm	No	64
EPM5130GC100	Altera	UV PLD	Commercial	Pin/Peg	100	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No	5.25 V	128	CMOS				5	5 V	Grid Array, Window	PGA100M,13X13	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	19 Dedicated Inputs, 64 I/O	19	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P100	1	4.96 mm	33.528 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms	e0	33.3 MHz			220 °C (428 °F)	33.528 mm	No	64
EPM5130GM-2	Altera	UV PLD	Military	Pin/Peg	100	WPGA	Square	Ceramic, Metal-Sealed Cofired	45 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)		Perpendicular	S-CPGA-P100		3.81 mm	33.528 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz				33.528 mm		64
EP610DI24-35	Altera	UV PLD	Industrial	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	37 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Dual	R-GDIP-T24		5.08 mm	7.62 mm	No	16 Macrocells; 2 External Clocks		37 MHz				32 mm		16
EPM5032AJC-10	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	10 ns	Yes	5.25 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	320	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	125 MHz		16	220 °C (428 °F)	11.43 mm		16
EP320DM-1	Altera	UV PLD	Military	Through-Hole	20	WDIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	9 Dedicated Inputs, 8 I/O	9	-55 °C (-67 °F)		Dual	R-GDIP-T20		4.826 mm	7.62 mm	No	8 Macrocells; Shared Input/Clock		58.8 MHz				24.003 mm		8
EPM5032DM-25	Altera	UV PLD	Military	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No			CMOS		24	PAL-TYPE	5	5 V	In-Line, Window	DIP28,.3	Programmable Logic Devices		Macrocell		320	2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 16 I/O	7	-55 °C (-67 °F)	Tin Lead	Dual	R-GDIP-T28		5.08 mm	7.62 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz		16	220 °C (428 °F)	36.83 mm		16
EP1810GC-35	Altera	UV PLD	Commercial	Pin/Peg	68	PGA	Square	Ceramic, Metal-Sealed Cofired	40 ns	No	5.25 V	48	CMOS				5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P68	1			No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	28.6 MHz			220 °C (428 °F)		No	48
5962-8947601XX	Altera	UV PLD	Military	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	37 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V			125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J28				No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	28.6 MHz						16
EPM5130JC	Altera	UV PLD	Commercial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns	Yes	5.25 V	128	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	19 Dedicated Inputs, 48 I/O	19	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz			220 °C (428 °F)	29.21 mm	No	48
5962-8947601XA	Altera	UV PLD	Military	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	37 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V			125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J28				No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	28.6 MHz						16
5962-9206201MZC	Altera	UV PLD	Military	Pin/Peg	84	PGA	Square	Ceramic, Metal-Sealed Cofired	90 ns	No	5.5 V		CMOS	MIL-STD-883 Class B			5		Grid Array				Macrocell	4.5 V			125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84				No			19.6 MHz						64
EPM5192GC84	Altera	UV PLD	Commercial	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No	5.25 V	192	CMOS				5	5 V	Grid Array, Window	PGA84M,11X11	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P84	1	4.96 mm	28.448 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms	e0	33.3 MHz			220 °C (428 °F)	28.448 mm	No	64
EP312DC-25	Altera	UV PLD	Commercial	Through-Hole	24	DIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No	5.25 V		CMOS		22	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	200	2.54 mm	70 °C (158 °F)	8 Dedicated Inputs, 12 I/O	8	0 °C (32 °F)	Tin/Lead	Dual	R-GDIP-T24				No	12 Macrocells	e0	66 MHz	30 s	12	220 °C (428 °F)			12
5962-01-418-0528	Altera	UV PLD	Commercial	Pin/Peg	68	PGA	Square	Ceramic	70 ns	No		48	CMOS				5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No				2.54 mm	70 °C (158 °F)			0 °C (32 °F)		Perpendicular	S-XPGA-P68				No								No
EP610JM-35	Altera	UV PLD	Military	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	37 ns	Yes	5.5 V		CMOS		20	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.5 V	160	1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J28		4.826 mm	11.43 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	28.6 MHz		16	220 °C (428 °F)	11.43 mm		16
EPM5130JI-2	Altera	UV PLD	Industrial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	45 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	19 Dedicated Inputs, 48 I/O	19	-40 °C (-40 °F)		Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz				29.21 mm		48
EPM5032D5962-25	Altera	UV PLD	Military	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 16 I/O	7	-55 °C (-67 °F)		Dual	R-GDIP-T28		5.08 mm	7.62 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock		50 MHz				36.83 mm		16
EP1810JC68-35	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	40 ns	Yes	5.25 V		CMOS				5		Chip Carrier, Window				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells; Shared Input/Clock		28.6 MHz				24.13 mm		48
EP900DC-3	Altera	UV PLD	Commercial	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	50 ns	No	5.25 V		CMOS		36	PAL-TYPE	5	5 V	In-Line, Window	DIP40,.6	Programmable Logic Devices		Macrocell	4.75 V	240	2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T40		5.715 mm	15.24 mm	No	24 Macrocells	e0	23.8 MHz		24	220 °C (428 °F)	52.07 mm		24
EP1810JC68-25	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	28 ns	Yes	5.25 V		CMOS				5		Chip Carrier, Window				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells; Shared Input/Clock		40 MHz				24.13 mm		48
EPM5032DI28-20	Altera	UV PLD	Industrial	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed	20 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	7 Dedicated Inputs, 16 I/O	7	-40 °C (-40 °F)		Dual	R-GDIP-T28		5.08 mm	7.62 mm	No	32 Macrocells		71.4 MHz				36.83 mm		16
EPM5192AGC84-15	Altera	UV PLD	Commercial	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	25 ns	No	5.25 V	192	CMOS				5	5 V	Grid Array, Window	PGA84M,11X11	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P84	1	4.96 mm	27.94 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	83.3 MHz			220 °C (428 °F)	27.94 mm	No	64
EP1800JI-2	Altera	UV PLD	Industrial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	70 ns	Yes	5.5 V	48	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells	e0	20.8 MHz			220 °C (428 °F)	24.13 mm	No	48
EPM5016DI20-20	Altera	UV PLD	Industrial	Through-Hole	20	WDIP	Rectangular	Ceramic, Glass-Sealed	20 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	7 Dedicated Inputs, 8 I/O	7	-40 °C (-40 °F)		Dual	R-GDIP-T20		5.08 mm	7.62 mm	No	16 Macrocells; Shared Input/Clock; Shared Product Terms		62.5 MHz				24.13 mm		8
EP1800GC-2	Altera	UV PLD	Commercial	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	70 ns	No	5.25 V	48	CMOS				5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P68	1	5.0038 mm	27.94 mm	No	48 Macrocells	e0	20.8 MHz			220 °C (428 °F)	27.94 mm	No	48
EP910IDI-25	Altera	UV PLD	Industrial	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	28 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)		Dual	R-GDIP-T40		5.75 mm	15.24 mm	No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks		40 MHz				52.07 mm		24
EP1800JC	Altera	UV PLD	Commercial	J Bend	68	QCCJ	Square	Ceramic	90 ns	Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-XQCC-J68				No		e0				220 °C (428 °F)		No
EP610DM24-35	Altera	UV PLD	Military	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	37 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)		Dual	R-GDIP-T24		5.08 mm	7.62 mm	No	16 Macrocells; 2 External Clocks		28.6 MHz				32 mm		16
EP910DI-40	Altera	UV PLD	Industrial	Through-Hole	40	DIP	Rectangular	Ceramic, Glass-Sealed	43 ns	No	5.5 V		CMOS		36	PAL-TYPE	5	5 V	In-Line	DIP40,.6	Programmable Logic Devices		Macrocell	4.5 V	240	2.54 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)	Tin Lead	Dual	R-GDIP-T40				No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	25 MHz		24	220 °C (428 °F)			24
EP610JM883BX-35	Altera	UV PLD	Military	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	37 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)		Quad	S-CQCC-J28		4.826 mm	11.43 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks		28.6 MHz				11.43 mm		16

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.