UV PLD Programmable Logic Devices (PLD) 725

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EP910JI-40	Altera	UV PLD	Industrial	J Bend	44	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	43 ns	Yes	5.5 V		CMOS		36	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.5 V	240	1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 24 I/O	12	-40 °C (-40 °F)	Tin Lead	Quad	S-CQCC-J44		4.826 mm	16.51 mm	No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	25 MHz	24	220 °C (428 °F)	16.51 mm		24
EP910JC44-40	Altera	UV PLD	Commercial	J Bend	44	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	43 ns	Yes	5.25 V		CMOS				5		Chip Carrier, Window				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)		Quad	S-CQCC-J44		4.57 mm	16.51 mm	No	24 Macrocells; 2 External Clocks		25 MHz			16.51 mm		24
EPM5192GI	Altera	UV PLD	Industrial	Pin/Peg	84	PGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No	5.5 V	192	CMOS				5	5 V	Grid Array	PGA84M,11X11	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	7 Dedicated Inputs, 64 I/O	7	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P84	1			No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)		No	64
EP320DC-1	Altera	UV PLD	Commercial	Through-Hole	20	WDIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No	5.25 V		CMOS		18	PAL-TYPE	5	5 V	In-Line, Window	DIP20,.3	Programmable Logic Devices		Macrocell	4.75 V	72	2.54 mm	70 °C (158 °F)	9 Dedicated Inputs, 8 I/O	9	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T20		4.826 mm	7.62 mm	No	8 Macrocells; Shared Input/Clock	e0	58.8 MHz	8	220 °C (428 °F)	24.003 mm		8
EPM5192AJI84-20	Altera	UV PLD	Industrial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	33 ns	Yes	5.5 V	192	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 64 I/O	7	-40 °C (-40 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	66.7 MHz		220 °C (428 °F)	29.21 mm	No	64
5962-8854901YX	Altera	UV PLD	Military	Pin/Peg	68	PGA	Square		85 ns	No	5.5 V		CMOS	MIL-STD-883			5		Grid Array				Macrocell	4.5 V			125 °C (257 °F)	11 Dedicated Inputs, 48 I/O	11	-55 °C (-67 °F)		Perpendicular	S-XPGA-P68				No			12.2 MHz					48
EP324DC-30	Altera	UV PLD	Commercial	Through-Hole	40	DIP	Rectangular	Ceramic, Glass-Sealed	30 ns	No	5.25 V		CMOS		36	PAL-TYPE	5	5 V	In-Line	DIP40,.6	Programmable Logic Devices		Macrocell	4.75 V	394	2.54 mm	70 °C (158 °F)	8 Dedicated Inputs, 24 I/O	8	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T40				No	24 Macrocells	e0	50 MHz	24	220 °C (428 °F)			24
5962-9314402MYC	Altera	UV PLD	Military	Pin/Peg	100	PGA	Square	Ceramic, Metal-Sealed Cofired	59 ns	No	5.5 V		CMOS	MIL-STD-883 Class B			5		Grid Array				Macrocell	4.5 V			125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)		Perpendicular	S-CPGA-P100				No			27.7 MHz					64
EPM5192JC	Altera	UV PLD	Commercial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns	Yes	5.25 V	192	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz		220 °C (428 °F)	29.21 mm	No	64
EP1810GM68-45	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	50 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)		Perpendicular	S-CPGA-P68		4.953 mm	27.94 mm	No	48 Macrocells; Shared Input/Clock		22.2 MHz			27.94 mm		48
EP610IDI-15	Altera	UV PLD	Industrial	Through-Hole	24	DIP	Rectangular	Ceramic, Glass-Sealed	18 ns	No	5.5 V		CMOS				5		In-Line				Macrocell	4.5 V			85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Dual	R-GDIP-T24				No			66 MHz					16
EP1810GI68-45	Altera	UV PLD	Industrial	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	50 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Perpendicular	S-CPGA-P68		4.96 mm	27.94 mm	No	48 Macrocells; Shared Input/Clock		33.3 MHz			27.94 mm		48
EPM5128AJC-20	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	33 ns	Yes	5.25 V	128	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	66.7 MHz		220 °C (428 °F)	24.13 mm	No	52
EP310DC-2	Altera	UV PLD	Commercial	Through-Hole	20	WDIP	Rectangular	Ceramic, Glass-Sealed	35 ns	No	5.25 V		CMOS		18	PAL-TYPE	5	5 V	In-Line, Window	DIP20,.3	Programmable Logic Devices		Macrocell	4.75 V	74	2.54 mm	70 °C (158 °F)	9 Dedicated Inputs, 8 I/O	9	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T20		4.826 mm	7.62 mm	No	Shared Input/Clock	e0	35.7 MHz	8	220 °C (428 °F)	24.003 mm		8
EP1800GI	Altera	UV PLD	Industrial	Pin/Peg	68	PGA	Square	Ceramic	90 ns	No		48	CMOS				5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No				2.54 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Perpendicular	S-XPGA-P68	1			No		e0			220 °C (428 °F)		No
EP910IDC-15	Altera	UV PLD	Commercial	Through-Hole	40	DIP	Rectangular	Ceramic, Glass-Sealed	18 ns	No	5.25 V		CMOS		36	PAL-TYPE	5	5 V	In-Line	DIP40,.6	Programmable Logic Devices		Macrocell	4.75 V	240	2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T40				No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks	e0	66.6 MHz	24	220 °C (428 °F)			24
5962-8753904LX	Altera	UV PLD	Military	Through-Hole	24	DIP	Rectangular	Ceramic, Glass-Sealed		No			CMOS						In-Line				Macrocell				125 °C (257 °F)	11 Dedicated Inputs, 10 I/O	11	-55 °C (-67 °F)		Dual	R-GDIP-T24				No								10
EPM5128GC68	Altera	UV PLD	Commercial	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No	5.25 V	128	CMOS				5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P68	1	4.96 mm	27.94 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms	e0	33.3 MHz		220 °C (428 °F)	27.94 mm	No	52
EP1800GI-2	Altera	UV PLD	Industrial	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	70 ns	No	5.5 V	48	CMOS				5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P68	1	5.0038 mm	27.94 mm	No	48 Macrocells	e0	20.8 MHz		220 °C (428 °F)	27.94 mm	No	48
EP1210JM	Altera	UV PLD	Military	J Bend	44	WQCCJ	Square	Ceramic, Glass-Sealed	90 ns	Yes	5.5 V		CMOS		36	PAL-TYPE	5		Chip Carrier, Window	LDCC44,.7SQ	Programmable Logic Devices		Macrocell	4.5 V	236	1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)	Tin Lead	Quad	S-GQCC-J44		4.57 mm	16.51 mm	No	28 Macrocells	e0	17.5 MHz	24	220 °C (428 °F)	16.51 mm		24
EP910DC40-40	Altera	UV PLD	Commercial	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	43 ns	No	5.25 V		CMOS				5		In-Line, Window				Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)		Dual	R-GDIP-T40		5.75 mm	15.24 mm	No	24 Macrocells; 2 External Clocks		32.3 MHz			52.07 mm		24
EPM5192JM84	Altera	UV PLD	Military	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz			29.21 mm		64
EPM7256WC208-25	Altera	UV PLD	Commercial	Gull Wing	208	QFP	Square	Ceramic	25 ns	Yes		256	CMOS				5	5 V	Flatpack	QFP208,1.2SQ,20	Programmable Logic Devices	No				.5 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	S-XQFP-G208				No		e0			220 °C (428 °F)		No
EP1810GI-45	Altera	UV PLD	Industrial	Pin/Peg	68	PGA	Square	Ceramic, Metal-Sealed Cofired	50 ns	No	5.5 V	48	CMOS				5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P68	1			No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	22.2 MHz		220 °C (428 °F)		No	48
EPS448JM-20	Altera	UV PLD	Military	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired		Yes	5.5 V		CMOS				5		Chip Carrier, Window				Registered	4.5 V		1.27 mm	125 °C (257 °F)	8 Dedicated Inputs, 0 I/O	8	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J28		4.826 mm	11.43 mm	No	Stand-Alone Microsequencer	e0	20 MHz		220 °C (428 °F)	11.43 mm		0
EPM5032JC28-20	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	20 ns	Yes	5.25 V		CMOS		24	PAL-TYPE	5	5 V	Chip Carrier, Window	LDCC28,.5SQ	Programmable Logic Devices		Macrocell	4.75 V	320	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	32 Macrocells; Shared Input/Clock; Shared Product Terms	e0	62.5 MHz	16	220 °C (428 °F)	11.43 mm		16
EP1810JM883B-45	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	50 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)		Quad	S-CQCC-J68		4.826 mm	24.13 mm	No	48 Macrocells; 4 External Clocks; Shared Input/Clock		22.2 MHz			24.13 mm		48
5962-8946901YC	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P68		3.81 mm	27.94 mm	No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e4	22.2 MHz			27.94 mm		48
5962-8753906LA	Altera	UV PLD	Military	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	10 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	11 Dedicated Inputs, 10 I/O	11	-55 °C (-67 °F)	Tin Lead	Dual	R-GDIP-T24		5.08 mm	7.62 mm	No	10 Macrocells; 1 External Clock; Shared Input/Clock; Variable Product Terms	e0	83 MHz			32 mm		10
EPM5192AGI84-15	Altera	UV PLD	Industrial	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	25 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	7 Dedicated Inputs, 64 I/O	7	-40 °C (-40 °F)		Perpendicular	S-CPGA-P84		4.96 mm	27.94 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock		83.3 MHz			27.94 mm		64
EPM5064JC44-1	Altera	UV PLD	Commercial	J Bend	44	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	40 ns	Yes	5.25 V	64	CMOS				5	5 V	Chip Carrier, Window	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 28 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J44		4.57 mm	16.51 mm	No	64 Macrocells; Shared Input/Clock; Shared Product Terms	e0	50 MHz		220 °C (428 °F)	16.51 mm	No	28
EPM5130WM883B-2	Altera	UV PLD	Military	Gull Wing	100	WQFP	Rectangular	Ceramic, Metal-Sealed Cofired	45 ns	Yes	5.5 V	128	CMOS	38535Q/M;38534H;883B			5	5 V	Flatpack, Window	QFP100,.7X.9	Programmable Logic Devices	No	Macrocell	4.5 V		.65 mm	125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)	Tin Lead	Quad	R-CQFP-G100		2.99 mm	14 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz		220 °C (428 °F)	19.2 mm	No	64
EP610DI-10	Altera	UV PLD	Industrial	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed		No	5.5 V						5		In-Line, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Dual	R-GDIP-T24		5.08 mm	7.62 mm	No					220 °C (428 °F)	32 mm		16
EPM5128GC-1	Altera	UV PLD	Commercial	Pin/Peg	68	PGA	Square	Ceramic, Metal-Sealed Cofired	40 ns	No	5.25 V	128	CMOS				5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P68	1			No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz		220 °C (428 °F)		No	52
EPM5064JC-2	Altera	UV PLD	Commercial	J Bend	44	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	45 ns	Yes	5.25 V	64	CMOS				5	5 V	Chip Carrier, Window	LDCC44,.7SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 28 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J44		4.57 mm	16.51 mm	No	Labs interconnected by PIA; 4 Labs; 64 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz		220 °C (428 °F)	16.51 mm	No	28
EPM5032DC28-17	Altera	UV PLD	Commercial	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed	17 ns	No	5.25 V		CMOS				5		In-Line, Window				Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)		Dual	R-GDIP-T28		5.08 mm	7.62 mm	No	32 Macrocells; Shared Input/Clock; Shared Product Terms		71.4 MHz			36.83 mm		16
5962-9314401MXX	Altera	UV PLD	Military	Gull Wing	100	QFP	Rectangular	Ceramic, Metal-Sealed Cofired	75 ns	Yes	5.5 V	128	CMOS	MIL-STD-883 Class B			5	5 V	Flatpack	QFP100,.7X.9	Programmable Logic Devices	No	Macrocell	4.5 V		.635 mm	125 °C (257 °F)	19 Dedicated Inputs, 63 I/O	19	-55 °C (-67 °F)	Matte Tin	Quad	R-CQFP-G100		3.35 mm	13.2 mm	No		e3	22.2 MHz		220 °C (428 °F)	19.2 mm	No	63
EPS448DC28-25	Altera	UV PLD	Commercial	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed		No	5.25 V		CMOS				5		In-Line, Window				Registered	4.75 V		2.54 mm	70 °C (158 °F)	8 Dedicated Inputs, 0 I/O	8	0 °C (32 °F)		Dual	R-GDIP-T28		5.08 mm	7.62 mm	No	PLS		25 MHz			36.83 mm		0
EPM5130WC-1	Altera	UV PLD	Commercial	Gull Wing	100	WQFP	Rectangular	Ceramic, Metal-Sealed Cofired	40 ns	Yes	5.25 V	128	CMOS				5	5 V	Flatpack, Window	QFP100,.7X.9	Programmable Logic Devices	No	Macrocell	4.75 V		.65 mm	70 °C (158 °F)	19 Dedicated Inputs, 64 I/O	19	0 °C (32 °F)	Tin Lead	Quad	R-CQFP-G100		2.99 mm	14 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz		220 °C (428 °F)	19.2 mm	No	64
5962-01-324-9618	Altera	UV PLD	Military	Pin/Peg	68	PGA	Square	Ceramic	75 ns	No		48	CMOS	38535Q/M;38534H;883B			5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No				2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)		Perpendicular	S-XPGA-P68				No							No
EP320DM883B	Altera	UV PLD	Military	Through-Hole	20	WDIP	Rectangular	Ceramic, Glass-Sealed	45 ns	No	5.5 V		CMOS	38535Q/M;38534H;883B	18	PAL-TYPE	5	5 V	In-Line, Window	DIP20,.3	Programmable Logic Devices		Macrocell	4.5 V	72	2.54 mm	125 °C (257 °F)	9 Dedicated Inputs, 8 I/O	9	-55 °C (-67 °F)	Tin Lead	Dual	R-GDIP-T20		4.826 mm	7.62 mm	No	8 Macrocells; Shared Input/Clock	e0	30.3 MHz	8	220 °C (428 °F)	24.003 mm		8
5962-8854801QX	Altera	UV PLD	Military	Through-Hole	40	DIP	Rectangular		60 ns	No	5.5 V		CMOS	MIL-STD-883			5		In-Line				Macrocell	4.5 V			125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)		Dual	R-XDIP-T40				No			14.3 MHz					24
EPM5192WM	Altera	UV PLD	Military	Gull Wing	100	WQFP	Rectangular	Ceramic, Metal-Sealed Cofired	55 ns	Yes	5.5 V	192	CMOS				5	5 V	Flatpack, Window	QFP100,.7X.9	Programmable Logic Devices	No	Macrocell	4.5 V		.65 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	R-CQFP-G100		3.35 mm	13.2 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)	19.2 mm	No	64
EPM5130JI	Altera	UV PLD	Industrial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns	Yes	5.5 V	128	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	19 Dedicated Inputs, 48 I/O	19	-40 °C (-40 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)	29.21 mm	No	48
EPM5130GM883B-2	Altera	UV PLD	Military	Pin/Peg	100	WPGA	Square	Ceramic, Metal-Sealed Cofired	45 ns	No	5.5 V	128	CMOS	38535Q/M;38534H;883B			5	5 V	Grid Array, Window	PGA100M,13X13	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P100		3.81 mm	33.528 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz		220 °C (428 °F)	33.528 mm	No	64
EP312DC-30	Altera	UV PLD	Commercial	Through-Hole	24	DIP	Rectangular	Ceramic, Glass-Sealed	30 ns	No	5.25 V		CMOS		22	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	200	2.54 mm	70 °C (158 °F)	8 Dedicated Inputs, 12 I/O	8	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T24				No	12 Macrocells	e0	50 MHz	12	220 °C (428 °F)			12
EPM5128AGC-12	Altera	UV PLD	Commercial	Pin/Peg	68	PGA	Square	Ceramic	20 ns	No		128	CMOS				5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No				2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Perpendicular	S-XPGA-P68	1			No		e0			220 °C (428 °F)		No
EP1810GI-35	Altera	UV PLD	Industrial	Pin/Peg	68	PGA	Square	Ceramic, Metal-Sealed Cofired	35 ns	No	5.5 V						5		Grid Array				Macrocell	4.5 V			85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Perpendicular	S-CPGA-P68				No			40 MHz					48

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.