UV PLD Programmable Logic Devices (PLD) 725

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Architecture	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	No. of Product Terms	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EPS448DI28-20	Altera	UV PLD	Industrial	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed		No	5.5 V		CMOS				5		In-Line, Window				Registered	4.5 V		2.54 mm	85 °C (185 °F)	8 Dedicated Inputs, 0 I/O	8	-40 °C (-40 °F)		Dual	R-GDIP-T28		5.08 mm	7.62 mm	No	PLS		20 MHz			36.83 mm		0
EP610DI24-20	Altera	UV PLD	Industrial	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	22 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Dual	R-GDIP-T24		5.08 mm	7.62 mm	No	16 Macrocells; 2 External Clocks		62.5 MHz			32 mm		16
5962-8946901YX	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No	5.5 V	48	CMOS	38535Q/M;38534H;883B			5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P68		3.81 mm	27.94 mm	No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e4	22.2 MHz		220 °C (428 °F)	27.94 mm	No	48
EP1800JC-1	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	90 ns	Yes	5.25 V	48	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells	e0	25 MHz		220 °C (428 °F)	24.13 mm	No	48
EP900DC-2	Altera	UV PLD	Commercial	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	45 ns	No	5.25 V		CMOS		36	PAL-TYPE	5	5 V	In-Line, Window	DIP40,.6	Programmable Logic Devices		Macrocell	4.75 V	240	2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 24 I/O	12	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T40		5.715 mm	15.24 mm	No	24 Macrocells	e0	26.3 MHz	24	220 °C (428 °F)	52.07 mm		24
EPM5032DM883B-25	Altera	UV PLD	Military	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed	25 ns	No	5.5 V		CMOS			PAL-TYPE	5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 16 I/O	7	-55 °C (-67 °F)		Dual	R-GDIP-T28		5.08 mm	7.62 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock		50 MHz			36.83 mm		16
EPM5032DC28-20	Altera	UV PLD	Commercial	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed	20 ns	No	5.25 V		CMOS		24	PAL-TYPE	5	5 V	In-Line, Window	DIP28,.3	Programmable Logic Devices		Macrocell	4.75 V	320	2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T28		5.08 mm	7.62 mm	No	32 Macrocells; Shared Input/Clock; Shared Product Terms	e0	62.5 MHz	16	220 °C (428 °F)	36.83 mm		16
EPM5130WC100-1	Altera	UV PLD	Commercial	Gull Wing	100	WQFP	Rectangular	Ceramic, Metal-Sealed Cofired	40 ns	Yes	5.25 V		CMOS				5		Flatpack, Window				Macrocell	4.75 V		.65 mm	70 °C (158 °F)	19 Dedicated Inputs, 64 I/O	19	0 °C (32 °F)	Matte Tin	Quad	R-CQFP-G100		3.35 mm	13.2 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms	e3	50 MHz			19.2 mm		64
EPM5032ADC-12	Altera	UV PLD	Commercial	Through-Hole	28	WDIP	Rectangular	Ceramic, Glass-Sealed	12 ns	No	5.25 V		CMOS		24	PAL-TYPE	5	5 V	In-Line, Window	DIP28,.3	Programmable Logic Devices		Macrocell	4.75 V	320	2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T28		5.08 mm	7.62 mm	No	Macrocells interconnected by PIA; 1 LAB; 32 Macrocells; 1 External Clock; Shared Input/Clock	e0	111.1 MHz	16	220 °C (428 °F)	36.83 mm		16
EPM5032JC28-25	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns	Yes	5.25 V		CMOS				5		Chip Carrier, Window				Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 16 I/O	7	0 °C (32 °F)		Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	32 Macrocells; Shared Input/Clock; Shared Product Terms		50 MHz		220 °C (428 °F)	11.43 mm		16
EPM5128AGM68-20	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	33 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P68		4.953 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		66.7 MHz			27.94 mm		52
EP610DI24-15	Altera	UV PLD	Industrial	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	17 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Dual	R-GDIP-T24		5.08 mm	7.62 mm	No	16 Macrocells; 2 External Clocks		83.3 MHz			32 mm		16
EPM5128JMB	Altera	UV PLD	Military	J Bend	68	QCCJ	Square	Ceramic	35 ns	Yes		128	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J68						e0			220 °C (428 °F)		No
EPM5128AG5962-20	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	33 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P68		3.81 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		66.7 MHz			27.94 mm		52
EPB1400J	Altera	UV PLD		J Bend	44	WQCCJ	Square	Ceramic, Glass-Sealed		Yes			CMOS						Chip Carrier, Window				Macrocell			1.27 mm		4 Dedicated Inputs, 20 I/O	4			Quad	S-GQCC-J44		4.57 mm	16.51 mm	No	20 Macrocells					16.51 mm		20
EP1210JM-1	Altera	UV PLD	Military	J Bend	44	WQCCJ	Square	Ceramic, Glass-Sealed	50 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)		Quad	S-GQCC-J44		4.57 mm	16.51 mm	No	28 Macrocells		28.5 MHz			16.51 mm		24
EP1810JM68-45	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	50 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells; Shared Input/Clock		22.2 MHz			24.13 mm		48
EPM5130GC100-2	Altera	UV PLD	Commercial	Pin/Peg	100	WPGA	Square	Ceramic, Metal-Sealed Cofired	45 ns	No	5.25 V		CMOS				5		Grid Array, Window				Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	19 Dedicated Inputs, 64 I/O	19	0 °C (32 °F)		Perpendicular	S-CPGA-P100		4.96 mm	33.528 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms		40 MHz			33.528 mm		64
EPS448JC-20	Altera	UV PLD	Commercial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired		Yes	5.25 V		CMOS				5		Chip Carrier, Window				Registered	4.75 V		1.27 mm	70 °C (158 °F)	8 Dedicated Inputs, 0 I/O	8	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J28		4.826 mm	11.43 mm	No	Stand-Alone Microsequencer	e0	20 MHz		220 °C (428 °F)	11.43 mm		0
EPM5064JI-2	Altera	UV PLD	Industrial	J Bend	44	QCCJ	Square	Ceramic	30 ns	Yes		64	CMOS				5	5 V	Chip Carrier	LDCC44,.7SQ	Programmable Logic Devices	No				1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Quad	S-XQCC-J44				No		e0			220 °C (428 °F)		No
5962-8854901YC	Altera	UV PLD	Military	Pin/Peg	68	PGA	Square		85 ns	No	5.5 V		CMOS	MIL-STD-883			5		Grid Array				Macrocell	4.5 V			125 °C (257 °F)	11 Dedicated Inputs, 48 I/O	11	-55 °C (-67 °F)		Perpendicular	S-XPGA-P68				No			12.2 MHz					48
EP1800JMB	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	90 ns	Yes	5.5 V	48	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	48 Macrocells	e0			220 °C (428 °F)	24.13 mm	No	48
EPM5192JM	Altera	UV PLD	Military	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns	Yes	5.5 V	192	CMOS				5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)	29.21 mm	No	64
EP910DM883B-40	Altera	UV PLD	Military	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	43 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)		Dual	R-GDIP-T40		5.588 mm	15.24 mm	No	Macrocells Interconnected By Global Bus; 24 Macrocells; 2 External Clocks		25 MHz			52.07 mm		24
EP1810GI-25	Altera	UV PLD	Industrial	Pin/Peg	68	PGA	Square	Ceramic, Metal-Sealed Cofired	28 ns	No	5.5 V	48	CMOS				5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P68	1			No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	40 MHz		220 °C (428 °F)		No	48
EPM5130GC	Altera	UV PLD	Commercial	Pin/Peg	100	PGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No	5.25 V	128	CMOS				5	5 V	Grid Array	PGA100M,13X13	Programmable Logic Devices	No	Macrocell	4.75 V		2.54 mm	70 °C (158 °F)	19 Dedicated Inputs, 64 I/O	19	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P100	1			No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)		No	64
EPM5032JI28-25	Altera	UV PLD	Industrial	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 16 I/O	7	-40 °C (-40 °F)		Quad	S-CQCC-J28		4.57 mm	11.43 mm	No	32 Macrocells; Shared Input/Clock; Shared Product Terms		50 MHz			11.43 mm		16
EP600IDM883B-55	Altera	UV PLD	Military	Through-Hole	24	WDIP	Rectangular	Ceramic, Metal-Sealed Cofired	55 ns	No	5.5 V			MIL-STD-883 Class B			5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Dual	R-CDIP-T24		4.826 mm	7.62 mm			e0	23.3 MHz		220 °C (428 °F)	31.9405 mm
EPM5128JC	Altera	UV PLD	Commercial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns	Yes	5.25 V	128	CMOS				5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V		1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz		220 °C (428 °F)	24.13 mm	No	52
EP610DM883B-35	Altera	UV PLD	Military	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	37 ns	No	5.5 V		CMOS			PAL-TYPE	5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Dual	R-GDIP-T24		5.08 mm	7.62 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks	e0	28.5 MHz			32 mm		16
EP600DC-3	Altera	UV PLD	Commercial	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	45 ns	No	5.25 V		CMOS		20	PAL-TYPE	5	5 V	In-Line, Window	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	160	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T24		4.826 mm	7.62 mm	No	16 Macrocells	e0	26.3 MHz	16	220 °C (428 °F)	31.9405 mm		16
EPM5130GM	Altera	UV PLD	Military	Pin/Peg	100	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns	No	5.5 V	128	CMOS				5	5 V	Grid Array, Window	PGA100M,13X13	Programmable Logic Devices	No	Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P100		3.81 mm	33.528 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)	33.528 mm	No	64
5962-9314402MXA	Altera	UV PLD	Military	Gull Wing	100	WQFP	Rectangular	Ceramic, Metal-Sealed Cofired	45 ns	Yes	5.5 V		CMOS	MIL-STD-883			5		Flatpack, Window				Macrocell	4.5 V		.65 mm	125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)	Tin Lead	Quad	R-CQFP-G100		2.99 mm	14 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz			19.2 mm		64
5962-8863501RA	Altera	UV PLD	Military	Through-Hole	20	DIP	Rectangular	Ceramic, Glass-Sealed	50 ns	No	5.5 V		CMOS	MIL-STD-883			5		In-Line				Mixed	4.5 V			125 °C (257 °F)	8 Dedicated Inputs, 8 I/O	8	-55 °C (-67 °F)		Dual	R-GDIP-T20				No								8
EPM5128WC	Altera	UV PLD	Commercial	Gull Wing	100	QFP	Rectangular	Ceramic	35 ns	Yes		128	CMOS				5	5 V	Flatpack	QFP100,.7X1.0	Programmable Logic Devices	No				.635 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Quad	R-XQFP-G100				No		e0			220 °C (428 °F)		No
EPM5128JM-2	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	45 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz			24.13 mm		52
EP610JM5962-35	Altera	UV PLD	Military	J Bend	28	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	37 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)		Quad	S-CQCC-J28		4.826 mm	11.43 mm	No	Macrocells Interconnected By Global Bus; 16 Macrocells; 2 External Clocks		28.6 MHz			11.43 mm		16
EP610DC-20	Altera	UV PLD	Commercial	Through-Hole	24	DIP	Rectangular	Ceramic, Glass-Sealed	22 ns	No	5.25 V		CMOS		20	PAL-TYPE	5	5 V	In-Line	DIP24,.3	Programmable Logic Devices		Macrocell	4.75 V	160	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 16 I/O	4	0 °C (32 °F)	Tin Lead	Dual	R-GDIP-T24				No		e0	55.6 MHz	16	220 °C (428 °F)			16
EP600DMB	Altera	UV PLD	Military	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	55 ns	No	5.5 V		CMOS		20	PAL-TYPE	5	5 V	In-Line, Window	DIP24,.3	Programmable Logic Devices		Macrocell	4.5 V	160	2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 16 I/O	4	-55 °C (-67 °F)	Tin Lead	Dual	R-GDIP-T24		4.826 mm	7.62 mm	No	16 Macrocells	e0	22.2 MHz	16	220 °C (428 °F)	31.9405 mm		16
EPM5130WC100	Altera	UV PLD	Commercial	Gull Wing	100	WQFP	Rectangular	Ceramic, Metal-Sealed Cofired	55 ns	Yes	5.25 V		CMOS				5		Flatpack, Window				Macrocell	4.75 V		.65 mm	70 °C (158 °F)	19 Dedicated Inputs, 64 I/O	19	0 °C (32 °F)	Matte Tin	Quad	R-CQFP-G100		3.35 mm	13.2 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms	e3	33.3 MHz			19.2 mm		64
EP610DI24-25	Altera	UV PLD	Industrial	Through-Hole	24	WDIP	Rectangular	Ceramic, Glass-Sealed	27 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 16 I/O	4	-40 °C (-40 °F)		Dual	R-GDIP-T24		5.08 mm	7.62 mm	No	16 Macrocells; 2 External Clocks		47.6 MHz			32 mm		16
EPM5128AJM68-15	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		83.3 MHz			24.13 mm		52
EP900DMB	Altera	UV PLD	Military	Through-Hole	40	WDIP	Rectangular	Ceramic, Glass-Sealed	60 ns	No	5.5 V		CMOS				5		In-Line, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 24 I/O	12	-55 °C (-67 °F)		Dual	R-GDIP-T40		5.715 mm	15.24 mm	No	24 Macrocells		20 MHz			52.07 mm		24
EP1800JM	Altera	UV PLD	Military	J Bend	68	QCCJ	Square	Ceramic	90 ns	Yes		48	CMOS				5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No				1.27 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Quad	S-XQCC-J68				No		e0			220 °C (428 °F)		No
EPM5128JM68	Altera	UV PLD	Military	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns	Yes	5.5 V		CMOS				5		Chip Carrier, Window				Macrocell	4.5 V		1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)		Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz			24.13 mm		52
EPM5192AGM84-20	Altera	UV PLD	Military	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	33 ns	No	5.5 V		CMOS				5		Grid Array, Window				Macrocell	4.5 V		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84		4.96 mm	27.94 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock		66.7 MHz			27.94 mm		64
EPM5130AWC-20	Altera	UV PLD	Commercial	Gull Wing	100	WQFP	Rectangular	Ceramic, Metal-Sealed Cofired	33 ns	Yes	5.25 V		CMOS				5		Flatpack, Window				Macrocell	4.75 V		.65 mm	70 °C (158 °F)	19 Dedicated Inputs, 64 I/O	19	0 °C (32 °F)	Matte Tin	Quad	R-CQFP-G100		2.99 mm	14 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e3	66.7 MHz			19.2 mm		64
EPM5127DC-2	Altera	UV PLD	Commercial	Through-Hole	40	DIP	Rectangular	Ceramic		No		128	CMOS				5	5 V	In-Line	DIP40,.6	Programmable Logic Devices	No				2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Dual	R-XDIP-T40				No		e0			220 °C (428 °F)		No

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.