Part | RoHS | Manufacturer | Programmable IC Type | Grading Of Temperature | Form Of Terminal | No. of Terminals | Package Code | Package Shape | Total Dose (V) | Package Body Material | No. of Logic Cells | Surface Mount | Maximum Supply Voltage | No. of CLBs | Technology Used | Screening Level | No. of Inputs | No. of Equivalent Gates | Nominal Supply Voltage (V) | Packing Method | Power Supplies (V) | Package Style (Meter) | Package Equivalence Code | Sub-Category | Minimum Supply Voltage | Pitch Of Terminal | Maximum Operating Temperature | Maximum Combinatorial Delay of a CLB | Organization | Minimum Operating Temperature | Finishing Of Terminal Used | Position Of Terminal | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Seated Height | Width | Qualification | Additional Features | JESD-609 Code | Maximum Clock Frequency | Maximum Time At Peak Reflow Temperature (s) | No. of Outputs | Peak Reflow Temperature (C) | Length |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
Xilinx |
FPGA |
Other |
Pin/Peg |
191 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
238 |
No |
5.25 V |
100 |
CMOS |
160 |
2500 |
5 |
5 V |
Grid Array |
PGA191M,18X18 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
6 ns |
100 CLBS, 2500 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P191 |
4.064 mm |
47.244 mm |
No |
200 flip-flops; typical gates = 2500-3000 |
90.9 MHz |
160 |
47.244 mm |
|||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
144 |
CMOS |
2000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
9 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000 |
70 MHz |
37.084 mm |
||||||||||||||||||
Xilinx |
FPGA |
Pin/Peg |
132 |
PGA |
Rectangular |
Plastic/Epoxy |
No |
CMOS |
5 |
Grid Array |
Perpendicular |
R-PPGA-P132 |
No |
|||||||||||||||||||||||||||||||
|
Xilinx |
FPGA |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
5.5 V |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
2.7 ns |
144 CLBS, 2000 Gates |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
Typical gates = 2000-3000 |
270 MHz |
96 |
37.084 mm |
||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
191 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
950 |
No |
5.5 V |
400 |
CMOS |
MIL-PRF-38535 |
160 |
7000 |
5 |
5 V |
Grid Array |
PGA191M,18X18 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
125 °C (257 °F) |
2.01 ns |
400 CLBS, 7000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P191 |
4.318 mm |
47.244 mm |
No |
Maximum usable gates = 20000 |
125 MHz |
160 |
47.244 mm |
|||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
411 |
HIPGA |
Square |
Ceramic, Metal-Sealed Cofired |
1936 |
No |
3.6 V |
1936 |
CMOS |
352 |
33000 |
3.3 |
3.3 V |
Grid Array, Heat Sink/Slug, Interstitial Pitch |
SPGA411,39X39 |
Field Programmable Gate Arrays |
3 V |
2.54 mm |
85 °C (185 °F) |
1.2 ns |
1936 CLBS, 33000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P411 |
5.969 mm |
52.324 mm |
No |
Typical gates = 33000-100000 |
217 MHz |
352 |
52.324 mm |
|||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
484 |
No |
5.25 V |
484 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
4.1 ns |
484 CLBS, 6500 Gates |
0 °C (32 °F) |
Perpendicular |
S-PPGA-P175 |
1 |
4.191 mm |
42.164 mm |
No |
Typical gates = 6500-7500 |
188 MHz |
144 |
42.164 mm |
|||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
CMOS |
MIL-STD-883 |
144 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
e4 |
230 MHz |
144 |
42.164 mm |
||||||||||||||
|
Xilinx |
FPGA |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
120 |
No |
5.5 V |
120 |
CMOS |
124 |
4000 |
5 |
5 V |
Grid Array |
PGA156,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
3.8 ns |
120 CLBS, 4000 Gates |
Perpendicular |
S-CPGA-P156 |
4.318 mm |
42.164 mm |
No |
Typical gates = 4000-6000 |
83 MHz |
124 |
42.164 mm |
||||||||||||
Xilinx |
FPGA |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
324 |
No |
5.5 V |
324 |
CMOS |
196 |
10000 |
5 |
5 V |
Grid Array |
PGA223,18X18 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
3 ns |
324 CLBS, 10000 Gates |
Perpendicular |
S-CPGA-P223 |
1 |
4.318 mm |
47.244 mm |
No |
Typical gates = 10000-16000 |
83 MHz |
196 |
47.244 mm |
||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
576 |
CMOS |
10000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
576 CLBS, 10000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P223 |
4.318 mm |
47.244 mm |
No |
e3 |
166 MHz |
47.244 mm |
||||||||||||||||
|
Xilinx |
FPGA |
Industrial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
No |
5.5 V |
64 |
CMOS |
64 |
2000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
64 CLBS, 2000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
MAX 64 I/OS; 256 flip-flops |
50 MHz |
64 |
27.94 mm |
||||||||||
Xilinx |
FPGA |
Pin/Peg |
299 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
2304 |
No |
5.5 V |
2304 |
CMOS |
9000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
100 °C (212 °F) |
3 ns |
2304 CLBS, 9000 Gates |
-40 °C (-40 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P299 |
4.318 mm |
52.324 mm |
No |
2304 flip-flops; typical gates = 9000-13000 |
e3 |
111 MHz |
52.324 mm |
||||||||||||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
224 |
No |
CMOS |
110 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
2.54 mm |
85 °C (185 °F) |
-40 °C (-40 °F) |
Perpendicular |
S-PPGA-P132 |
No |
110 |
|||||||||||||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
225 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.25 V |
400 |
7000 |
5 |
Grid Array |
4.75 V |
85 °C (185 °F) |
2.7 ns |
400 CLBS, 7000 Gates |
0 °C (32 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P225 |
No |
Can also use 20000 gates |
e3 |
111 MHz |
|||||||||||||||||||
|
Xilinx |
FPGA |
Pin/Peg |
191 |
HPGA |
Square |
Ceramic, Metal-Sealed Cofired |
324 |
No |
5.5 V |
324 |
CMOS |
144 |
6000 |
5 |
5 V |
Grid Array, Heat Sink/Slug |
PGA191M,18X18 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
2 ns |
324 CLBS, 6000 Gates |
Perpendicular |
S-CPGA-P191 |
4.318 mm |
47.244 mm |
No |
Max usable 8000 Logic gates |
125 MHz |
144 |
47.244 mm |
||||||||||||
Xilinx |
FPGA |
Pin/Peg |
411 |
HIPGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
CMOS |
3.3 |
Grid Array, Heat Sink/Slug, Interstitial Pitch |
2.54 mm |
Matte Tin |
Perpendicular |
S-CPGA-P411 |
5.334 mm |
52.324 mm |
No |
e3 |
52.324 mm |
|||||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
120 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
100 |
No |
5.5 V |
100 |
CMOS |
80 |
2000 |
5 |
5 V |
Grid Array |
PGA120,13X13 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
125 °C (257 °F) |
100 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P120 |
4.318 mm |
34.544 mm |
No |
125 MHz |
80 |
34.544 mm |
||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
64 |
CMOS |
1000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
64 CLBS, 1000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
256 flip-flops; typical gates = 1000-1500 |
50 MHz |
27.94 mm |
|||||||||||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
475 |
HPGA |
Square |
Ceramic, Metal-Sealed Cofired |
5472 |
No |
3.6 V |
2304 |
CMOS |
384 |
40000 |
3.3 |
3.3 V |
Grid Array, Heat Sink/Slug |
SPGA475,41X41 |
Field Programmable Gate Arrays |
3 V |
2.54 mm |
85 °C (185 °F) |
1.1 ns |
2304 CLBS, 40000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P475 |
5.969 mm |
54.864 mm |
No |
Max usable 62000 Logic gates |
238 MHz |
384 |
54.864 mm |
||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
132 |
PGA |
Square |
Plastic/Epoxy |
No |
5.25 V |
144 |
CMOS |
2000 |
5 |
Grid Array |
4.75 V |
2.54 mm |
85 °C (185 °F) |
7 ns |
144 CLBS, 2000 Gates |
0 °C (32 °F) |
Perpendicular |
S-PPGA-P132 |
3.7338 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000 |
100 MHz |
37.084 mm |
||||||||||||||||
|
Xilinx |
FPGA |
Industrial |
Pin/Peg |
191 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
770 |
No |
5.5 V |
324 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array |
PGA191M,18X18 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
6 ns |
324 CLBS, 6500 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P191 |
4.064 mm |
47.244 mm |
No |
936 flip-flops; typical gates = 6500-8000 |
90.9 MHz |
144 |
47.244 mm |
|||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
475 |
HIPGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
3.6 V |
3136 |
CMOS |
MIL-PRF-38535 Class Q |
55000 |
3.3 |
Grid Array, Heat Sink/Slug, Interstitial Pitch |
3 V |
2.54 mm |
125 °C (257 °F) |
1.3 ns |
3136 CLBS, 55000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P475 |
5.969 mm |
54.864 mm |
No |
200 MHz |
54.864 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
191 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
400 |
CMOS |
MIL-STD-883 |
8000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
6 ns |
400 CLBS, 8000 Gates |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P191 |
4.318 mm |
47.244 mm |
No |
e4 |
47.244 mm |
|||||||||||||||||
|
Xilinx |
FPGA |
Commercial |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
5.25 V |
144 |
CMOS |
96 |
3000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
3.3 ns |
144 CLBS, 3000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
MAX 96 I/OS; 480 flip-flops; typical gates = 3000 - 3700 |
230 MHz |
96 |
37.084 mm |
|||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
144 |
CMOS |
MIL-STD-883 Class B |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
14 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000; power-down supplier current = 120 µA |
50 MHz |
96 |
37.084 mm |
||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
196 |
No |
5.5 V |
196 |
CMOS |
112 |
3000 |
5 |
5 V |
Grid Array |
PGA156,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
125 °C (257 °F) |
2.7 ns |
196 CLBS, 3000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P156 |
4.318 mm |
42.164 mm |
No |
Typical gates = 3000-9000 |
111 MHz |
112 |
42.164 mm |
|||||||||
|
Xilinx |
FPGA |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
No |
5.5 V |
64 |
CMOS |
84 |
2000 |
5 |
5 V |
Grid Array |
PGA156,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
3 ns |
64 CLBS, 2000 Gates |
Perpendicular |
S-CPGA-P156 |
4.318 mm |
42.164 mm |
No |
Typical gates = 2000-3000 |
83 MHz |
84 |
42.164 mm |
||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
CMOS |
MIL-STD-883 |
1800 |
5 |
Grid Array |
4.5 V |
125 °C (257 °F) |
1800 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
No |
|||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
144 |
CMOS |
2000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
9 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
480 flip-flops; typical gates = 2000-3000 |
70 MHz |
27.94 mm |
||||||||||||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
411 |
HPGA |
Square |
Ceramic, Metal-Sealed Cofired |
1600 |
No |
3.6 V |
1600 |
CMOS |
320 |
27000 |
3.3 |
3.3 V |
Grid Array, Heat Sink/Slug |
SPGA411,39X39 |
Field Programmable Gate Arrays |
3 V |
2.54 mm |
85 °C (185 °F) |
1.5 ns |
1600 CLBS, 27000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P411 |
5.969 mm |
52.324 mm |
No |
Max usable 44000 Logic gates |
179 MHz |
320 |
52.324 mm |
|||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
191 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
324 |
CMOS |
6000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
324 CLBS, 6000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P191 |
4.318 mm |
47.244 mm |
No |
e3 |
125 MHz |
47.244 mm |
|||||||||||||||
|
Xilinx |
FPGA |
Industrial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
100 |
No |
5.5 V |
100 |
CMOS |
74 |
3000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
100 CLBS, 3000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
MAX 74 I/OS; 360 flip-flops |
50 MHz |
74 |
27.94 mm |
||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
175 |
PGA |
Square |
Plastic/Epoxy |
No |
5.25 V |
320 |
CMOS |
5000 |
5 |
Grid Array |
4.75 V |
2.54 mm |
85 °C (185 °F) |
5.5 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Perpendicular |
S-PPGA-P175 |
3.937 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000 |
125 MHz |
42.164 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
484 |
No |
484 |
CMOS |
38535Q/M;38534H;883B |
176 |
6500 |
5 |
5 V |
Grid Array |
PGA223,18X18 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
484 CLBS, 6500 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P223 |
1 |
4.064 mm |
47.244 mm |
No |
MAX 176 I/OS; 1320 flip-flops; typical gates = 6500 - 9000 |
190 MHz |
176 |
47.244 mm |
||||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
191 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
770 |
No |
5.25 V |
324 |
CMOS |
144 |
6500 |
5 |
5 V |
Grid Array |
PGA191M,18X18 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
4 ns |
324 CLBS, 6500 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P191 |
4.064 mm |
47.244 mm |
No |
936 flip-flops; typical gates = 6500-8000 |
133.3 MHz |
144 |
47.244 mm |
|||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
224 |
No |
5.25 V |
224 |
CMOS |
110 |
3500 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
5.5 ns |
224 CLBS, 3500 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
688 flip-flops; typical gates = 3500-4500; power-down supplier current = 170 µA |
125 MHz |
110 |
37.084 mm |
|||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
68 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
No |
5.5 V |
64 |
CMOS |
58 |
600 |
5 |
5 V |
Grid Array |
PGA68,11X11 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
125 °C (257 °F) |
10 ns |
64 CLBS, 600 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P68 |
4.064 mm |
27.94 mm |
No |
122 flip-flops; typical gates = 600-1000 |
70 MHz |
58 |
27.94 mm |
|||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
352 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
3.6 V |
1024 |
CMOS |
18000 |
3.3 |
Grid Array |
3 V |
85 °C (185 °F) |
1024 CLBS, 18000 Gates |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-CPGA-P352 |
No |
e0 |
166 MHz |
||||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
144 |
CMOS |
74 |
2000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
9 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Tin Silver Copper |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
480 flip-flops; typical gates = 2000-3000; power-down supplier current = 120 µA |
e1 |
70 MHz |
74 |
27.94 mm |
|||||||||
|
Xilinx |
FPGA |
Pin/Peg |
559 |
HPGA |
Square |
Ceramic, Metal-Sealed Cofired |
3136 |
No |
3.6 V |
3136 |
CMOS |
448 |
55000 |
3.3 |
3.3 V |
Grid Array, Heat Sink/Slug |
HSPGA559,43X43 |
Field Programmable Gate Arrays |
3 V |
2.54 mm |
1.3 ns |
3136 CLBS, 55000 Gates |
Perpendicular |
S-CPGA-P559 |
5.969 mm |
57.404 mm |
No |
Max usable 85000 Logic gates |
200 MHz |
448 |
57.404 mm |
||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
144 |
CMOS |
2000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000 |
50 MHz |
37.084 mm |
|||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
196 |
CMOS |
3000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
196 CLBS, 3000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P156 |
4.318 mm |
42.164 mm |
No |
166 MHz |
42.164 mm |
||||||||||||||||||
|
Xilinx |
FPGA |
Industrial |
Pin/Peg |
175 |
PGA |
Square |
Ceramic |
320 |
No |
CMOS |
144 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
2.54 mm |
85 °C (185 °F) |
-40 °C (-40 °F) |
Perpendicular |
S-XPGA-P175 |
No |
144 |
||||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic |
100 |
No |
CMOS |
74 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Perpendicular |
S-XPGA-P84 |
No |
70 MHz |
74 |
||||||||||||||||||||
Xilinx |
FPGA |
Pin/Peg |
411 |
HIPGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
CMOS |
3.3 |
Grid Array, Heat Sink/Slug, Interstitial Pitch |
2.54 mm |
Matte Tin |
Perpendicular |
S-CPGA-P411 |
5.334 mm |
52.324 mm |
No |
e3 |
52.324 mm |
|||||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
1024 |
No |
5.5 V |
784 |
CMOS |
256 |
13000 |
5 |
5 V |
Grid Array |
PGA223,18X18 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
125 °C (257 °F) |
784 CLBS, 13000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P223 |
4.318 mm |
47.244 mm |
No |
125 MHz |
256 |
47.244 mm |
||||||||||||
Xilinx |
FPGA |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
144 |
CMOS |
2000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
9 ns |
144 CLBS, 2000 Gates |
Matte Tin |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000 |
e3 |
70 MHz |
37.084 mm |
Field Programmable Gate Arrays (FPGAs) are digital integrated circuits that are programmable by the user to perform specific logic functions. They consist of a matrix of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes FPGAs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.
FPGAs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the FPGA hardware. The resulting configuration data is then loaded onto the FPGA, allowing it to perform the desired logic functions.
FPGAs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.